diff options
author | Thomas White <taw@physics.org> | 2018-06-23 17:50:16 +0200 |
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committer | Thomas White <taw@physics.org> | 2018-06-23 17:50:16 +0200 |
commit | c4cdeef09cb36f0e7e9d84571a023f59b33b7d1c (patch) | |
tree | 82f0f5c10f631d895bcd29e26cd208b0365a9941 /src/slow_status_flash.s | |
parent | 07ddaabc49362f672e0d4f52f57220aac7af39cf (diff) |
More tidying up, proper SWI handler
Diffstat (limited to 'src/slow_status_flash.s')
-rw-r--r-- | src/slow_status_flash.s | 29 |
1 files changed, 12 insertions, 17 deletions
diff --git a/src/slow_status_flash.s b/src/slow_status_flash.s index afb7be4..988a825 100644 --- a/src/slow_status_flash.s +++ b/src/slow_status_flash.s @@ -18,31 +18,26 @@ * */ -@ vim:ft=armv5 +.include "swi_numbers.h" -.section .text .global flash_status_led flash_status_led: - LDR R8, =0x3f200000 - LDR R1, [R8, #0x04] @ GPFSEL1 - ORR R1, R1, #1<<18 @ GPIO pin 16 is output - BIC R1, R1, #3<<21 @ GPIO pin 17 is input - ORR R1, R1, #1<<24 @ GPIO pin 18 is output - STR R1, [R8, #0x04] @ GPFSEL1 forever: - MRC P15, 0, R0, C0, C0, 5 - AND R0, R0, #0x0f -flashred: + SWI OS_GetCPUID + MOV R7, R0 + MOV R6, R7 + MOV R0, #0 +1: MOV R1, #1<<29 - STR R1, [R8, #0x1c] @ GPSET0 + SWI OS_SetGPIO BL longpause MOV R1, #1<<29 - STR R1, [R8, #0x28] @ GPCLR0 + SWI OS_ClearGPIO BL longpause - SUBS R0, R0, #1 - BNE flashred + SUBS R6, R6, #1 + BNE 1b BL longpause BL longpause @@ -51,7 +46,7 @@ flashred: longpause: MOV R2, #0x3f0000 -1: +2: SUBS R2, R2, #1 - BNE 1b + BNE 2b MOV PC, LR |