diff options
| author | Eric Miao <eric.miao@marvell.com> | 2009-01-07 11:30:49 +0800 |
|---|---|---|
| committer | Eric Miao <eric.miao@marvell.com> | 2009-03-09 21:22:37 +0800 |
| commit | 3b8e285c21d12082a85a142ef73a1648d41cae46 (patch) | |
| tree | 2666c51c4a61644956eea6369c9d824c60e9235b | |
| parent | da065a0b3611751feefeb0f0e277cd5830056dad (diff) | |
[ARM] pxa: move declaration of 'pxa_last_gpio' into <mach/gpio.h>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
| -rw-r--r-- | arch/arm/mach-pxa/generic.h | 1 | ||||
| -rw-r--r-- | arch/arm/mach-pxa/gpio.c | 4 | ||||
| -rw-r--r-- | arch/arm/mach-pxa/include/mach/gpio.h | 5 |
3 files changed, 6 insertions, 4 deletions
diff --git a/arch/arm/mach-pxa/generic.h b/arch/arm/mach-pxa/generic.h index bc12c9421ce..3465268ca71 100644 --- a/arch/arm/mach-pxa/generic.h +++ b/arch/arm/mach-pxa/generic.h @@ -20,7 +20,6 @@ extern void __init pxa3xx_init_irq(void); extern void __init pxa_map_io(void); extern unsigned int get_clk_frequency_khz(int info); -extern int pxa_last_gpio; #define SET_BANK(__nr,__start,__size) \ mi->bank[__nr].start = (__start), \ diff --git a/arch/arm/mach-pxa/gpio.c b/arch/arm/mach-pxa/gpio.c index 9a33eb07fe0..41935590e99 100644 --- a/arch/arm/mach-pxa/gpio.c +++ b/arch/arm/mach-pxa/gpio.c @@ -20,6 +20,8 @@ #include <mach/gpio.h> +int pxa_last_gpio; + #define GPIO0_BASE (GPIO_REGS_VIRT + 0x0000) #define GPIO1_BASE (GPIO_REGS_VIRT + 0x0004) #define GPIO2_BASE (GPIO_REGS_VIRT + 0x0008) @@ -38,8 +40,6 @@ struct pxa_gpio_chip { void __iomem *regbase; }; -int pxa_last_gpio; - static int pxa_gpio_direction_input(struct gpio_chip *chip, unsigned offset) { unsigned long flags; diff --git a/arch/arm/mach-pxa/include/mach/gpio.h b/arch/arm/mach-pxa/include/mach/gpio.h index be4900ea32d..4049b234eda 100644 --- a/arch/arm/mach-pxa/include/mach/gpio.h +++ b/arch/arm/mach-pxa/include/mach/gpio.h @@ -100,8 +100,11 @@ /* NOTE: some PXAs have fewer on-chip GPIOs (like PXA255, with 85). - * Those cases currently cause holes in the GPIO number space. + * Those cases currently cause holes in the GPIO number space, the + * actual number of the last GPIO is recorded by 'pxa_last_gpio'. */ +extern int pxa_last_gpio; + #define NR_BUILTIN_GPIO 128 static inline int gpio_get_value(unsigned gpio) |