diff options
| author | Cyrill Gorcunov <gorcunov@gmail.com> | 2008-09-14 21:58:49 +0400 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2008-10-13 10:21:14 +0200 |
| commit | 59ef48a58e59cc27255d526ae3fa60ddcd977208 (patch) | |
| tree | 4ea0c5025cc1d072ccca7c91dfe64491841985c8 | |
| parent | 33f8c40a30ae99e971d068c9ec6088e713c46f5f (diff) | |
x86: smpboot - check if we have ESR register in wakeup_secondary_cpu
We should check if we have ESR register before reading from it.
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
Cc: Yinghai Lu <yhlu.kernel@gmail.com>
Cc: "Maciej W. Rozycki" <macro@linux-mips.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
| -rw-r--r-- | arch/x86/kernel/smpboot.c | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c index b700c9a1064..a778e221ccf 100644 --- a/arch/x86/kernel/smpboot.c +++ b/arch/x86/kernel/smpboot.c @@ -599,10 +599,12 @@ wakeup_secondary_cpu(int logical_apicid, unsigned long start_eip) * Give the other CPU some time to accept the IPI. */ udelay(200); - maxlvt = lapic_get_maxlvt(); - if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */ - apic_write(APIC_ESR, 0); - accept_status = (apic_read(APIC_ESR) & 0xEF); + if (APIC_INTEGRATED(apic_version[phys_apicid])) { + maxlvt = lapic_get_maxlvt(); + if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */ + apic_write(APIC_ESR, 0); + accept_status = (apic_read(APIC_ESR) & 0xEF); + } pr_debug("NMI sent.\n"); if (send_status) |