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authorKrzysztof Helt <krzysztof.h1@wp.pl>2006-08-16 12:54:29 +0200
committerJaroslav Kysela <perex@suse.cz>2006-09-23 10:40:56 +0200
commit6fb982803522bc86ca61774c6edf317f77165453 (patch)
tree8603d66246dc7bae650febd87a1c6c0b164c75f5
parent42fe7647911d0bcaf81aac46db73a3b24387df6d (diff)
[ALSA] sparc dbri removal of DBRI_NO_INTS
This patch removes define DBR_NO_INTS and all code related to handling more than one dbri irq statuses block. Signed-off-by: Krzysztof Helt <krzysztof.h1@wp.pl> Signed-off-by: Takashi Iwai <tiwai@suse.de> Signed-off-by: Jaroslav Kysela <perex@suse.cz>
-rw-r--r--sound/sparc/dbri.c31
1 files changed, 8 insertions, 23 deletions
diff --git a/sound/sparc/dbri.c b/sound/sparc/dbri.c
index 652f433a3f0..4651ff51351 100644
--- a/sound/sparc/dbri.c
+++ b/sound/sparc/dbri.c
@@ -238,12 +238,6 @@ static struct {
#define REG9 0x24UL /* Interrupt Queue Pointer */
#define DBRI_NO_CMDS 64
-#define DBRI_NO_INTS 1 /* Note: the value of this define was
- * originally 2. The ringbuffer to store
- * interrupts in dma is currently broken.
- * This is a temporary fix until the ringbuffer
- * is fixed.
- */
#define DBRI_INT_BLK 64
#define DBRI_NO_DESCS 64
#define DBRI_NO_PIPES 32
@@ -268,7 +262,7 @@ struct dbri_mem {
*/
struct dbri_dma {
volatile s32 cmd[DBRI_NO_CMDS]; /* Place for commands */
- volatile s32 intr[DBRI_NO_INTS * DBRI_INT_BLK]; /* Interrupt field */
+ volatile s32 intr[DBRI_INT_BLK]; /* Interrupt field */
struct dbri_mem desc[DBRI_NO_DESCS]; /* Xmit/receive descriptors */
};
@@ -741,18 +735,6 @@ static void dbri_initialize(struct snd_dbri * dbri)
dprintk(D_GEN, "init: cmd: %p, int: %p\n",
&dbri->dma->cmd[0], &dbri->dma->intr[0]);
- /*
- * Initialize the interrupt ringbuffer.
- */
- for (n = 0; n < DBRI_NO_INTS - 1; n++) {
- dma_addr = dbri->dma_dvma;
- dma_addr += dbri_dma_off(intr, ((n + 1) * DBRI_INT_BLK));
- dbri->dma->intr[n * DBRI_INT_BLK] = dma_addr;
- }
- dma_addr = dbri->dma_dvma + dbri_dma_off(intr, 0);
- dbri->dma->intr[n * DBRI_INT_BLK] = dma_addr;
- dbri->dbri_irqp = 1;
-
/* Initialize pipes */
for (n = 0; n < DBRI_NO_PIPES; n++)
dbri->pipes[n].desc = dbri->pipes[n].first_desc = -1;
@@ -765,9 +747,14 @@ static void dbri_initialize(struct snd_dbri * dbri)
sbus_writel(tmp, dbri->regs + REG0);
/*
- * Set up the interrupt queue
+ * Initialize the interrupt ringbuffer.
*/
dma_addr = dbri->dma_dvma + dbri_dma_off(intr, 0);
+ dbri->dma->intr[0] = dma_addr;
+ dbri->dbri_irqp = 1;
+ /*
+ * Set up the interrupt queue
+ */
*(cmd++) = DBRI_CMD(D_IIQ, 0, 0);
*(cmd++) = dma_addr;
@@ -1951,10 +1938,8 @@ static void dbri_process_interrupt_buffer(struct snd_dbri * dbri)
while ((x = dbri->dma->intr[dbri->dbri_irqp]) != 0) {
dbri->dma->intr[dbri->dbri_irqp] = 0;
dbri->dbri_irqp++;
- if (dbri->dbri_irqp == (DBRI_NO_INTS * DBRI_INT_BLK))
+ if (dbri->dbri_irqp == DBRI_INT_BLK)
dbri->dbri_irqp = 1;
- else if ((dbri->dbri_irqp & (DBRI_INT_BLK - 1)) == 0)
- dbri->dbri_irqp++;
dbri_process_one_interrupt(dbri, x);
}