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authorMagnus Damm <magnus.damm@gmail.com>2008-03-21 18:43:19 +0900
committerPaul Mundt <lethal@linux-sh.org>2008-04-18 09:50:03 -0700
commit9db913c3a62a66517def9cb973bbaa45a2739018 (patch)
treed6aa405a5e7b6e02db63cbd79577285cd0757f87
parent6dea7814e1c6a27701a63b271fc580791e066537 (diff)
sh: Add MigoR header file
This patch adds a MigoR specific header file. We may want to use a cpu specific header file instead, but this will do for now. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-rw-r--r--arch/sh/boards/renesas/migor/setup.c9
-rw-r--r--include/asm-sh/migor.h58
2 files changed, 59 insertions, 8 deletions
diff --git a/arch/sh/boards/renesas/migor/setup.c b/arch/sh/boards/renesas/migor/setup.c
index 8a6ee842624..aa79fc87a72 100644
--- a/arch/sh/boards/renesas/migor/setup.c
+++ b/arch/sh/boards/renesas/migor/setup.c
@@ -14,6 +14,7 @@
#include <asm/machvec.h>
#include <asm/io.h>
#include <asm/sh_keysc.h>
+#include <asm/migor.h>
/* Address IRQ Size Bus Description
* 0x00000000 64MB 16 NOR Flash (SP29PL256N)
@@ -87,14 +88,6 @@ static int __init migor_devices_setup(void)
}
__initcall(migor_devices_setup);
-#define PORT_PJCR 0xA4050110UL
-#define PORT_PSELA 0xA405014EUL
-#define PORT_PYCR 0xA405014AUL
-#define PORT_PZCR 0xA405014CUL
-#define PORT_HIZCRA 0xA4050158UL
-#define PORT_HIZCRC 0xA405015CUL
-#define MSTPCR2 0xA4150038UL
-
static void __init migor_setup(char **cmdline_p)
{
/* SMC91C111 - Enable IRQ0 */
diff --git a/include/asm-sh/migor.h b/include/asm-sh/migor.h
new file mode 100644
index 00000000000..2329363afdc
--- /dev/null
+++ b/include/asm-sh/migor.h
@@ -0,0 +1,58 @@
+#ifndef __ASM_SH_MIGOR_H
+#define __ASM_SH_MIGOR_H
+
+/*
+ * linux/include/asm-sh/migor.h
+ *
+ * Copyright (C) 2008 Renesas Solutions
+ *
+ * Portions Copyright (C) 2007 Nobuhiro Iwamatsu
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ */
+#include <asm/addrspace.h>
+
+/* GPIO */
+#define MSTPCR0 0xa4150030
+#define MSTPCR1 0xa4150034
+#define MSTPCR2 0xa4150038
+
+#define PORT_PACR 0xa4050100
+#define PORT_PDCR 0xa4050106
+#define PORT_PECR 0xa4050108
+#define PORT_PHCR 0xa405010e
+#define PORT_PJCR 0xa4050110
+#define PORT_PKCR 0xa4050112
+#define PORT_PLCR 0xa4050114
+#define PORT_PMCR 0xa4050116
+#define PORT_PRCR 0xa405011c
+#define PORT_PWCR 0xa4050146
+#define PORT_PXCR 0xa4050148
+#define PORT_PYCR 0xa405014a
+#define PORT_PZCR 0xa405014c
+#define PORT_PADR 0xa4050120
+#define PORT_PWDR 0xa4050166
+
+#define PORT_HIZCRA 0xa4050158
+#define PORT_HIZCRC 0xa405015c
+
+#define PORT_MSELCRB 0xa4050182
+
+#define MSTPCR1 0xa4150034
+#define MSTPCR2 0xa4150038
+
+#define PORT_PSELA 0xa405014e
+#define PORT_PSELB 0xa4050150
+#define PORT_PSELC 0xa4050152
+#define PORT_PSELD 0xa4050154
+
+#define PORT_HIZCRA 0xa4050158
+#define PORT_HIZCRB 0xa405015a
+#define PORT_HIZCRC 0xa405015c
+
+#define BSC_CS6ABCR 0xfec1001c
+
+#endif /* __ASM_SH_MIGOR_H */