diff options
| author | Andy Green <andy@openmoko.com> | 2008-11-19 17:10:03 +0000 |
|---|---|---|
| committer | Andy Green <agreen@pads.home.warmcat.com> | 2008-11-19 17:10:03 +0000 |
| commit | ded3fa21f2e08080e22f4ca8808818b09a735b56 (patch) | |
| tree | 198f115feddf3affc34cfbe9534d6aea6487c94f | |
| parent | c949adb29312a02d66df4bb0f8eae9d29d5e7e31 (diff) | |
fix-glamo-turbo-host-interface.patch
Signed-off-by: Andy Green <andy@openmoko.com>
| -rw-r--r-- | arch/arm/mach-s3c2440/mach-gta02.c | 4 | ||||
| -rw-r--r-- | drivers/mfd/glamo/glamo-core.c | 12 |
2 files changed, 10 insertions, 6 deletions
diff --git a/arch/arm/mach-s3c2440/mach-gta02.c b/arch/arm/mach-s3c2440/mach-gta02.c index 8b38c3d43ea..61e4fae2bd3 100644 --- a/arch/arm/mach-s3c2440/mach-gta02.c +++ b/arch/arm/mach-s3c2440/mach-gta02.c @@ -66,6 +66,7 @@ #include <asm/arch/spi.h> #include <asm/arch/spi-gpio.h> #include <asm/arch/usb-control.h> +#include <asm/arch/regs-mem.h> #include <asm/arch/gta02.h> @@ -1562,6 +1563,9 @@ static void __init gta02_machine_init(void) spin_lock_init(&motion_irq_lock); + /* Glamo chip select optimization */ +/* *((u32 *)(S3C2410_MEMREG(((1 + 1) << 2)))) = 0x1280; */ + s3c_device_usb.dev.platform_data = >a02_usb_info; s3c_device_nand.dev.platform_data = >a02_nand_info; s3c_device_sdi.dev.platform_data = >a02_mmc_cfg; diff --git a/drivers/mfd/glamo/glamo-core.c b/drivers/mfd/glamo/glamo-core.c index 52223bf912c..29477caa036 100644 --- a/drivers/mfd/glamo/glamo-core.c +++ b/drivers/mfd/glamo/glamo-core.c @@ -740,18 +740,18 @@ static struct glamo_script glamo_init_script[] = { { GLAMO_REG_CLOCK_GEN7, 0x0101 }, { GLAMO_REG_CLOCK_GEN8, 0x0100 }, { GLAMO_REG_CLOCK_HOST, 0x000d }, - { 0x200, 0x0ef0 }, + /* + * b7..b4 = 0 = no wait states on read or write + * b0 = 1 select PLL2 for Host interface, b1 = enable it + */ + { 0x200, 0x0e03 }, { 0x202, 0x07ff }, { 0x212, 0x0000 }, { 0x214, 0x4000 }, { 0x216, 0xf00e }, { GLAMO_REG_MEM_TYPE, 0x0874 }, /* 8MB, 16 word pg wr+rd */ { GLAMO_REG_MEM_GEN, 0xafaf }, /* 63 grants min + max */ - /* - * the register below originally 0x0108 makes unreliable Glamo MMC - * write operations. Cranked to 0x05ad to add a wait state, the - * unreliability is not seen after 4GB of write / read testing - */ + { GLAMO_REG_MEM_TIMING1, 0x0108 }, { GLAMO_REG_MEM_TIMING2, 0x0010 }, /* Taa = 3 MCLK */ { GLAMO_REG_MEM_TIMING3, 0x0000 }, |