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authorAndy Fleming <afleming@freescale.com>2006-10-27 14:31:07 -0500
committerPaul Mackerras <paulus@samba.org>2006-11-01 14:52:48 +1100
commite0da0daee14862e0a5c49f2059641a8deb27eca2 (patch)
treecc124794f1b7957c17b5e6a854e134d924c8ac43
parent441cbd8dace80545db2ac43175ac1c097d96f75c (diff)
[POWERPC] Fix rmb() for e500-based machines it
The e500 core generates an illegal instruction exception when it tries to execute the lwsync instruction, which we currently use for rmb(). This fixes it by using the LWSYNC macro, which turns into a plain sync on 32-bit machines. Signed-off-by: Andrew Fleming <afleming@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
-rw-r--r--include/asm-powerpc/system.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/include/asm-powerpc/system.h b/include/asm-powerpc/system.h
index 43627596003..f7b1227d645 100644
--- a/include/asm-powerpc/system.h
+++ b/include/asm-powerpc/system.h
@@ -25,8 +25,8 @@
*
* We have to use the sync instructions for mb(), since lwsync doesn't
* order loads with respect to previous stores. Lwsync is fine for
- * rmb(), though. Note that lwsync is interpreted as sync by
- * 32-bit and older 64-bit CPUs.
+ * rmb(), though. Note that rmb() actually uses a sync on 32-bit
+ * architectures.
*
* For wmb(), we use sync since wmb is used in drivers to order
* stores to system memory with respect to writes to the device.
@@ -34,7 +34,7 @@
* SMP since it is only used to order updates to system memory.
*/
#define mb() __asm__ __volatile__ ("sync" : : : "memory")
-#define rmb() __asm__ __volatile__ ("lwsync" : : : "memory")
+#define rmb() __asm__ __volatile__ (__stringify(LWSYNC) : : : "memory")
#define wmb() __asm__ __volatile__ ("sync" : : : "memory")
#define read_barrier_depends() do { } while(0)