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authorRalf Baechle <ralf@linux-mips.org>2007-08-06 16:35:23 +0100
committerRalf Baechle <ralf@linux-mips.org>2007-08-27 02:16:55 +0100
commitfe56b954eadefb8b93b7d6b9244af38a352c8799 (patch)
tree9a39ce014e6e3e05534535ef872732f857a030d1
parent45a98eb2b775caa3d6113cb7a5c2ff4361e09c91 (diff)
[MIPS] SMTC: Move MIPS_CPU_IPI_IRQ definition into header.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/kernel/smtc.c2
-rw-r--r--include/asm-mips/smtc.h10
2 files changed, 10 insertions, 2 deletions
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c
index 16aa5d37117..43826c16101 100644
--- a/arch/mips/kernel/smtc.c
+++ b/arch/mips/kernel/smtc.c
@@ -28,8 +28,6 @@
* This file should be built into the kernel only if CONFIG_MIPS_MT_SMTC is set.
*/
-#define MIPS_CPU_IPI_IRQ 1
-
#define LOCK_MT_PRA() \
local_irq_save(flags); \
mtflags = dmt()
diff --git a/include/asm-mips/smtc.h b/include/asm-mips/smtc.h
index 44dfa4adecf..ff3e8936b49 100644
--- a/include/asm-mips/smtc.h
+++ b/include/asm-mips/smtc.h
@@ -55,4 +55,14 @@ extern void smtc_boot_secondary(int cpu, struct task_struct *t);
#define PARKED_INDEX ((unsigned int)0x80000000)
+/*
+ * Define low-level interrupt mask for IPIs, if necessary.
+ * By default, use SW interrupt 1, which requires no external
+ * hardware support, but which works only for single-core
+ * MIPS MT systems.
+ */
+#ifndef MIPS_CPU_IPI_IRQ
+#define MIPS_CPU_IPI_IRQ 1
+#endif
+
#endif /* _ASM_SMTC_MT_H */