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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2006-02-24 21:04:56 +0000
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-03-21 22:03:22 +0000
commit0f44ba1d1e67201c0c58af26eb441fa7014c89ec (patch)
treea6162e21b5ec6d96240b16e18d0e5f89c756c9a1 /arch/arm/kernel/head.S
parentfb1c7762b9b1f3c53daf0e700e977d77a29bcf04 (diff)
[ARM] Move read of processor ID out of lookup_processor_type()
Read the processor ID at boot, and save it in "processor_id" as we did before. Later, when we re-parse the CPU type in the setup.c code, re-use the value stored in "processor_id". This allows a cleaner work-around for noMMU devices without CP#15. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/kernel/head.S')
-rw-r--r--arch/arm/kernel/head.S15
1 files changed, 9 insertions, 6 deletions
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index 1aca1775b28..571d6d58491 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -82,6 +82,7 @@
ENTRY(stext)
msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | MODE_SVC @ ensure svc mode
@ and irqs disabled
+ mrc p15, 0, r9, c0, c0 @ get processor id
bl __lookup_processor_type @ r5=procinfo r9=cpuid
movs r10, r5 @ invalid processor (r5=0)?
beq __error_p @ yes, error 'p'
@@ -156,6 +157,7 @@ ENTRY(secondary_startup)
* as it has already been validated by the primary processor.
*/
msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | MODE_SVC
+ mrc p15, 0, r9, c0, c0 @ get processor id
bl __lookup_processor_type
movs r10, r5 @ invalid processor?
moveq r0, #'p' @ yes, error 'p'
@@ -450,19 +452,19 @@ __error:
* (and therefore, we are not in the correct address space). We have to
* calculate the offset.
*
+ * r9 = cpuid
* Returns:
* r3, r4, r6 corrupted
* r5 = proc_info pointer in physical address space
- * r9 = cpuid
+ * r9 = cpuid (preserved)
*/
.type __lookup_processor_type, %function
__lookup_processor_type:
adr r3, 3f
- ldmda r3, {r5, r6, r9}
- sub r3, r3, r9 @ get offset between virt&phys
+ ldmda r3, {r5 - r7}
+ sub r3, r3, r7 @ get offset between virt&phys
add r5, r5, r3 @ convert virt addresses to
add r6, r6, r3 @ physical address space
- mrc p15, 0, r9, c0, c0 @ get processor id
1: ldmia r5, {r3, r4} @ value, mask
and r4, r4, r9 @ mask wanted bits
teq r3, r4
@@ -477,10 +479,11 @@ __lookup_processor_type:
* This provides a C-API version of the above function.
*/
ENTRY(lookup_processor_type)
- stmfd sp!, {r4 - r6, r9, lr}
+ stmfd sp!, {r4 - r7, r9, lr}
+ mov r9, r0
bl __lookup_processor_type
mov r0, r5
- ldmfd sp!, {r4 - r6, r9, pc}
+ ldmfd sp!, {r4 - r7, r9, pc}
/*
* Look in include/asm-arm/procinfo.h and arch/arm/kernel/arch.[ch] for