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authorRuslan V. Sushko <rsushko@ru.mvista.com>2007-04-06 15:00:31 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-04-21 20:51:55 +0100
commit45fba0846f5a5a48ed3c394aa4f8ca93699e7655 (patch)
tree9c5b34c26fbb3364f2cb4dc80501abaf31458a1b /arch/arm/mach-ixp4xx/common-pci.c
parent25735d10ba477d5128b1e5ccef42062bea429075 (diff)
[ARM] 4311/1: ixp4xx: add KIXRP435 platform
Add Intel KIXRP435 Reference Platform based on IXP43x processor. Fixed after review : access to cp15 removed in identification functions, used access to global processor_id instead Signed-off-by: Vladimir Barinov <vbarinov@ru.mvista.com> Signed-off-by: Ruslan Sushko <rsushko@ru.mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-ixp4xx/common-pci.c')
-rw-r--r--arch/arm/mach-ixp4xx/common-pci.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c
index 9562177b5fe..bf04121d1a3 100644
--- a/arch/arm/mach-ixp4xx/common-pci.c
+++ b/arch/arm/mach-ixp4xx/common-pci.c
@@ -374,7 +374,7 @@ void __init ixp4xx_pci_preinit(void)
* Determine which PCI read method to use.
* Rev 0 IXP425 requires workaround.
*/
- if (!(processor_id & 0xf) && !cpu_is_ixp46x()) {
+ if (!(processor_id & 0xf) && cpu_is_ixp42x()) {
printk("PCI: IXP42x A0 silicon detected - "
"PCI Non-Prefetch Workaround Enabled\n");
ixp4xx_pci_read = ixp4xx_pci_read_errata;
@@ -480,7 +480,7 @@ int ixp4xx_setup(int nr, struct pci_sys_data *sys)
res[0].flags = IORESOURCE_IO;
res[1].name = "PCI Memory Space";
- res[1].start = 0x48000000;
+ res[1].start = PCIBIOS_MIN_MEM;
#ifndef CONFIG_IXP4XX_INDIRECT_PCI
res[1].end = 0x4bffffff;
#else