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| author | Ingo Molnar <mingo@elte.hu> | 2009-11-04 11:54:15 +0100 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2009-11-04 11:59:45 +0100 |
| commit | a2e71271535fde493c32803b1f34789f97efcb5e (patch) | |
| tree | 90d7139bea2f49e947f27af92614fa6eca50b64d /arch/arm/mach-omap1/serial.c | |
| parent | 6d7aa9d721c8c640066142fd9534afcdf68d7f9d (diff) | |
| parent | b419148e567728f6af0c3b01965c1cc141e3e13a (diff) | |
Merge commit 'v2.6.32-rc6' into perf/core
Conflicts:
tools/perf/Makefile
Merge reason: Resolve the conflict, merge to upstream and merge in
perf fixes so we can add a dependent patch.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/arm/mach-omap1/serial.c')
| -rw-r--r-- | arch/arm/mach-omap1/serial.c | 26 |
1 files changed, 0 insertions, 26 deletions
diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c index d496e50fec4..d23979bc0fd 100644 --- a/arch/arm/mach-omap1/serial.c +++ b/arch/arm/mach-omap1/serial.c @@ -131,8 +131,6 @@ void __init omap_serial_init(void) } for (i = 0; i < OMAP_MAX_NR_PORTS; i++) { - unsigned char reg; - switch (i) { case 0: uart1_ck = clk_get(NULL, "uart1_ck"); @@ -143,16 +141,6 @@ void __init omap_serial_init(void) if (cpu_is_omap15xx()) clk_set_rate(uart1_ck, 12000000); } - if (cpu_is_omap15xx()) { - omap_cfg_reg(UART1_TX); - omap_cfg_reg(UART1_RTS); - if (machine_is_omap_innovator()) { - reg = fpga_read(OMAP1510_FPGA_POWER); - reg |= OMAP1510_FPGA_PCR_COM1_EN; - fpga_write(reg, OMAP1510_FPGA_POWER); - udelay(10); - } - } break; case 1: uart2_ck = clk_get(NULL, "uart2_ck"); @@ -165,16 +153,6 @@ void __init omap_serial_init(void) else clk_set_rate(uart2_ck, 48000000); } - if (cpu_is_omap15xx()) { - omap_cfg_reg(UART2_TX); - omap_cfg_reg(UART2_RTS); - if (machine_is_omap_innovator()) { - reg = fpga_read(OMAP1510_FPGA_POWER); - reg |= OMAP1510_FPGA_PCR_COM2_EN; - fpga_write(reg, OMAP1510_FPGA_POWER); - udelay(10); - } - } break; case 2: uart3_ck = clk_get(NULL, "uart3_ck"); @@ -185,10 +163,6 @@ void __init omap_serial_init(void) if (cpu_is_omap15xx()) clk_set_rate(uart3_ck, 12000000); } - if (cpu_is_omap15xx()) { - omap_cfg_reg(UART3_TX); - omap_cfg_reg(UART3_RX); - } break; } omap_serial_reset(&serial_platform_data[i]); |