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authorMarc Zyngier <maz@misterjones.org>2009-12-26 21:24:12 +0100
committerEric Miao <eric.y.miao@gmail.com>2009-12-29 14:11:31 +0800
commit5f86cebaa56268f1afa2321e6d424530b1a49a12 (patch)
treeb3851f9aed72a289afc52b96001df1662bac51c2 /arch/arm/mach-pxa/zeus.c
parent100627b4bacd0bd669aab5a68f8a0bfd0d28d002 (diff)
[ARM] pxa/zeus: relax memory timings on Zeus ethernet ports
DM9000s on Zeus sometime fail under heavy load. Relaxing the timings a bit seems to be of a great help. Signed-off-by: Marc Zyngier <maz@misterjones.org> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Diffstat (limited to 'arch/arm/mach-pxa/zeus.c')
-rw-r--r--arch/arm/mach-pxa/zeus.c11
1 files changed, 10 insertions, 1 deletions
diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c
index 865df5d840e..2f480a2b153 100644
--- a/arch/arm/mach-pxa/zeus.c
+++ b/arch/arm/mach-pxa/zeus.c
@@ -726,9 +726,18 @@ static mfp_cfg_t zeus_pin_config[] __initdata = {
GPIO99_GPIO, /* CF RDY */
};
+/*
+ * DM9k MSCx settings: SRAM, 16 bits
+ * 17 cycles delay first access
+ * 5 cycles delay next access
+ * 13 cycles recovery time
+ * faster device
+ */
+#define DM9K_MSC_VALUE 0xe4c9
+
static void __init zeus_init(void)
{
- u16 dm9000_msc = 0xe279;
+ u16 dm9000_msc = DM9K_MSC_VALUE;
system_rev = __raw_readw(ZEUS_CPLD_VERSION);
pr_info("Zeus CPLD V%dI%d\n", (system_rev & 0xf0) >> 4, (system_rev & 0x0f));