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authorBen Dooks <ben-linux@fluff.org>2006-03-20 17:10:04 +0000
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-03-21 22:06:02 +0000
commit8e40a2f91c6e73726a75381e4438478eb5964cb7 (patch)
treeb0b66666c84151a2c382e189e2fbcc619d1edfb0 /arch/arm/mach-s3c2410/s3c2440-clock.c
parent766636cc3630ae3b9827e7b4b1f566572963f1ef (diff)
[ARM] 3330/1: S3C24XX - move UPLL to main clock
Patch from Ben Dooks Move the UPLL clock registration to the central clock file, and add an enable method Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-s3c2410/s3c2440-clock.c')
-rw-r--r--arch/arm/mach-s3c2410/s3c2440-clock.c19
1 files changed, 1 insertions, 18 deletions
diff --git a/arch/arm/mach-s3c2410/s3c2440-clock.c b/arch/arm/mach-s3c2410/s3c2440-clock.c
index b557a2be8a0..2d0fa03a257 100644
--- a/arch/arm/mach-s3c2410/s3c2440-clock.c
+++ b/arch/arm/mach-s3c2410/s3c2440-clock.c
@@ -45,11 +45,6 @@
/* S3C2440 extended clock support */
-static struct clk s3c2440_clk_upll = {
- .name = "upll",
- .id = -1,
-};
-
static struct clk s3c2440_clk_cam = {
.name = "camif",
.id = -1,
@@ -66,22 +61,11 @@ static struct clk s3c2440_clk_ac97 = {
static int s3c2440_clk_add(struct sys_device *sysdev)
{
- unsigned long upllcon = __raw_readl(S3C2410_UPLLCON);
unsigned long camdivn = __raw_readl(S3C2440_CAMDIVN);
struct clk *clk_h;
struct clk *clk_p;
- struct clk *clk_xtal;
-
- clk_xtal = clk_get(NULL, "xtal");
- if (IS_ERR(clk_xtal)) {
- printk(KERN_ERR "S3C2440: Failed to get clk_xtal\n");
- return -EINVAL;
- }
-
- s3c2440_clk_upll.rate = s3c2410_get_pll(upllcon, clk_xtal->rate);
- printk("S3C2440: Clock Support, UPLL %ld.%03ld MHz, DVS %s\n",
- print_mhz(s3c2440_clk_upll.rate),
+ printk("S3C2440: Clock Support, DVS %s\n",
(camdivn & S3C2440_CAMDIVN_DVSEN) ? "on" : "off");
clk_p = clk_get(NULL, "pclk");
@@ -97,7 +81,6 @@ static int s3c2440_clk_add(struct sys_device *sysdev)
s3c24xx_register_clock(&s3c2440_clk_ac97);
s3c24xx_register_clock(&s3c2440_clk_cam);
- s3c24xx_register_clock(&s3c2440_clk_upll);
clk_disable(&s3c2440_clk_ac97);
clk_disable(&s3c2440_clk_cam);