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| author | Werner Almesberger <werner@openmoko.org> | 2009-03-09 21:02:36 +0000 |
|---|---|---|
| committer | Andy Green <agreen@octopus.localdomain> | 2009-03-09 21:02:36 +0000 |
| commit | 7885f1816cc1bf4734f0556f10c7288f5d7917f5 (patch) | |
| tree | d4a26faad35f144676e08be27660256a2cab0540 /arch/arm/mach-s3c2442 | |
| parent | 69b0f5da26b44d352ff11d3e832f3ee277bb3343 (diff) | |
Adjust MCLK for use with PLL
The PLL converts a 26.6 MHz input clock to 87.8 MHz, which is later
divided by two and becomes PCLK. (See comments below for details.)
All this looks like a textbook example for platform stuff, but let's
take it one step a time.
Signed-off-by: Werner Almesberger <werner@openmoko.org>
Diffstat (limited to 'arch/arm/mach-s3c2442')
0 files changed, 0 insertions, 0 deletions