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authorLuotao Fu <l.fu@pengutronix.de>2008-09-09 10:19:42 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2008-09-09 12:13:52 +0200
commit2cf842b8967b5a9989a12e6105da9a82d24e5777 (patch)
tree5fe2dd145a57cfa260225559abb045d2dbe62df4 /arch/arm/plat-mxc
parent7113cdcdc1842d797ea99af8b57606a069945f16 (diff)
mxc: add cscr register defintions
This adds macros to get CSCR upper, lower and additional registers. These registers are needed to configure a chip select line. The offset layouts of these Registers are identical on mx27 and mx31, hence we can use the macros in generic way Signed-off-by: Luotao Fu <l.fu@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/plat-mxc')
-rw-r--r--arch/arm/plat-mxc/include/mach/mxc.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/plat-mxc/include/mach/mxc.h
index 332eda4dbd3..f6caab06213 100644
--- a/arch/arm/plat-mxc/include/mach/mxc.h
+++ b/arch/arm/plat-mxc/include/mach/mxc.h
@@ -33,4 +33,10 @@
# define cpu_is_mx27() (0)
#endif
+#if defined(CONFIG_ARCH_MX3) || defined(CONFIG_ARCH_MX2)
+#define CSCR_U(n) (IO_ADDRESS(WEIM_BASE_ADDR) + n * 0x10)
+#define CSCR_L(n) (IO_ADDRESS(WEIM_BASE_ADDR) + n * 0x10 + 0x4)
+#define CSCR_A(n) (IO_ADDRESS(WEIM_BASE_ADDR) + n * 0x10 + 0x8)
+#endif
+
#endif /* __ASM_ARCH_MXC_H__ */