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| author | Andrew Paprocki <andrew@ishiboo.com> | 2008-04-02 02:43:19 -0400 |
|---|---|---|
| committer | Wim Van Sebroeck <wim@iguana.be> | 2008-04-06 19:12:22 +0000 |
| commit | cc1020f15ad0f843c0111bf4b77bdfaabca79571 (patch) | |
| tree | 8bb1d0fc8804bd5bc3af8d02fd2ac953bb3e2e8a /arch/arm/plat-omap/timer32k.c | |
| parent | 6fdf5e67fe8d3c83500dad9acae985132c2459a3 (diff) | |
[WATCHDOG] it8712f_wdt Zero MSB timeout byte when disabling watchdog
I noticed this while testing the latest code. I'm not sure if it is required,
but the normal (or LSB) timeout value is set to zero, so the MSB should
be as well to stay consistent.
If the chip revision is >= 8, set MSB of the 16-bit timeout value to zero
when disabling the watchdog in it8712f_wdt_disable().
Signed-off-by: Andrew Paprocki <andrew@ishiboo.com>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Diffstat (limited to 'arch/arm/plat-omap/timer32k.c')
0 files changed, 0 insertions, 0 deletions