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authorBen Dooks <ben-linux@fluff.org>2008-10-21 14:06:40 +0100
committerBen Dooks <ben-linux@fluff.org>2008-10-21 14:12:15 +0100
commitbff25308d207e4f8b218d7850cb44cce249210f2 (patch)
treef8a92738c482c8c3690aa98b623c834da2656110 /arch/arm/plat-s3c64xx/include
parent88cdf9db4b3186253606422f2fad43429c4cd94f (diff)
[ARM] S3C64XX: Initial arch header files
Add the initial header files for the S3C64XX support to satisfy the minimal requirements to build a kernel. Some definitions will therefore be placeholders or empty functions that will ensure that the system can build and have base functionality. These will be filled in at a later date. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/plat-s3c64xx/include')
-rw-r--r--arch/arm/plat-s3c64xx/include/plat/irqs.h38
1 files changed, 38 insertions, 0 deletions
diff --git a/arch/arm/plat-s3c64xx/include/plat/irqs.h b/arch/arm/plat-s3c64xx/include/plat/irqs.h
new file mode 100644
index 00000000000..592a5635455
--- /dev/null
+++ b/arch/arm/plat-s3c64xx/include/plat/irqs.h
@@ -0,0 +1,38 @@
+/* linux/arch/arm/plat-s3c64xx/include/mach/irqs.h
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ * Ben Dooks <ben@simtec.co.uk>
+ * http://armlinux.simtec.co.uk/
+ *
+ * S3C64XX - Common IRQ support
+ */
+
+#ifndef __ASM_PLAT_S3C64XX_IRQS_H
+#define __ASM_PLAT_S3C64XX_IRQS_H __FILE__
+
+/* we keep the first set of CPU IRQs out of the range of
+ * the ISA space, so that the PC104 has them to itself
+ * and we don't end up having to do horrible things to the
+ * standard ISA drivers....
+ */
+
+#define S3C_IRQ_OFFSET (16)
+
+#define S3C_IRQ(x) ((x) + S3C_IRQ_OFFSET)
+
+/* Since the IRQ_EINT(x) are a linear mapping on current s3c64xx series
+ * we just defined them as an IRQ_EINT(x) macro from S3C_IRQ_EINT_BASE
+ * which we place after the pair of VICs. */
+
+#define S3C_IRQ_EINT_BASE S3C_IRQ(64)
+
+#define S3C_EINT(x) ((x) + S3C_IRQ_EINT_BASE)
+
+/* Define NR_IRQs here, machine specific can always re-define.
+ * Currently the IRQ_EINT27 is the last one we can have. */
+
+#define NR_IRQS (S3C_EINT(27) + 1)
+
+#endif /* __ASM_PLAT_S3C64XX_IRQS_H */
+