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authormerge <null@invalid>2008-12-03 09:23:13 +0000
committerAndy Green <agreen@pads.home.warmcat.com>2008-12-03 09:23:13 +0000
commit6c19559f4c6d0697f9c9c7706970ce70bb3d64c6 (patch)
treee6ab05f9261daab9c4dba611b53d95842466ac0e /arch/arm/plat-s3c64xx
parent80af66b5b7d6c4f76108150dd57a1303bb9d4051 (diff)
MERGE-via-pending-tracking-hist-MERGE-via-stable-tracking-MERGE-via-mokopatches-tracking-MERGE-via-master
pending-tracking-hist top was MERGE-via-stable-tracking-MERGE-via-mokopatches-tracking-MERGE-via-master / 6b5c5358de92f78cbdf6cf76eceec2b470ee6f59 ... parent commitmessage: From: merge <null@invalid> MERGE-via-stable-tracking-hist-MERGE-via-mokopatches-tracking-MERGE-via-master stable-tracking-hist top was MERGE-via-mokopatches-tracking-MERGE-via-master / 93854082272f850a9faee81c74310030e837a5ae ... parent commitmessage: From: merge <null@invalid> MERGE-via-mokopatches-tracking-hist-MERGE-via-master mokopatches-tracking-hist top was MERGE-via-master / c3ec0335ef762adf82547202a675bfb653eb99bb ... parent commitmessage: From: merge <null@invalid> MERGE-via-master- master top was / 5221720118174d16dbfdbb63668d2b533ae50101 ... parent commitmessage: From: Andy Green <andy@openmoko.com> fix-wm8753-DBG.patch Signed-off-by: Andy Green <andy@openmoko.com>
Diffstat (limited to 'arch/arm/plat-s3c64xx')
-rw-r--r--arch/arm/plat-s3c64xx/include/plat/pll.h6
-rw-r--r--arch/arm/plat-s3c64xx/irq-eint.c12
2 files changed, 14 insertions, 4 deletions
diff --git a/arch/arm/plat-s3c64xx/include/plat/pll.h b/arch/arm/plat-s3c64xx/include/plat/pll.h
index 1a8576422f1..90bbd72fdc4 100644
--- a/arch/arm/plat-s3c64xx/include/plat/pll.h
+++ b/arch/arm/plat-s3c64xx/include/plat/pll.h
@@ -12,9 +12,9 @@
* published by the Free Software Foundation.
*/
-#define S3C6400_PLL_MDIV_MASK ((1 << (25-16)) - 1)
-#define S3C6400_PLL_PDIV_MASK ((1 << (13-8)) - 1)
-#define S3C6400_PLL_SDIV_MASK ((1 << (2-0)) - 1)
+#define S3C6400_PLL_MDIV_MASK ((1 << (25-16+1)) - 1)
+#define S3C6400_PLL_PDIV_MASK ((1 << (13-8+1)) - 1)
+#define S3C6400_PLL_SDIV_MASK ((1 << (2-0+1)) - 1)
#define S3C6400_PLL_MDIV_SHIFT (16)
#define S3C6400_PLL_PDIV_SHIFT (8)
#define S3C6400_PLL_SDIV_SHIFT (0)
diff --git a/arch/arm/plat-s3c64xx/irq-eint.c b/arch/arm/plat-s3c64xx/irq-eint.c
index 87a43a0e542..a57636137a6 100644
--- a/arch/arm/plat-s3c64xx/irq-eint.c
+++ b/arch/arm/plat-s3c64xx/irq-eint.c
@@ -74,6 +74,7 @@ static void s3c_irq_eint_maskack(unsigned int irq)
static int s3c_irq_eint_set_type(unsigned int irq, unsigned int type)
{
int offs = eint_offset(irq);
+ int pin;
int shift;
u32 ctrl, mask;
u32 newvalue = 0;
@@ -82,7 +83,7 @@ static int s3c_irq_eint_set_type(unsigned int irq, unsigned int type)
if (offs > 27)
return -EINVAL;
- if (offs < 15)
+ if (offs <= 15)
reg = S3C64XX_EINT0CON0;
else
reg = S3C64XX_EINT0CON1;
@@ -125,6 +126,15 @@ static int s3c_irq_eint_set_type(unsigned int irq, unsigned int type)
ctrl |= newvalue << shift;
__raw_writel(ctrl, reg);
+ /* set the GPIO pin appropriately */
+
+ if (offs < 23)
+ pin = S3C64XX_GPN(offs);
+ else
+ pin = S3C64XX_GPM(offs - 23);
+
+ s3c_gpio_cfgpin(pin, S3C_GPIO_SFN(2));
+
return 0;
}