diff options
| author | Ben Dooks <ben-linux@fluff.org> | 2008-11-03 14:56:25 +0000 |
|---|---|---|
| committer | Ben Dooks <ben-linux@fluff.org> | 2008-11-03 19:50:13 +0000 |
| commit | f833228c21602f9466cbfbf13465f05b67b07a7f (patch) | |
| tree | b24b0cc6cfa1c3d00215342d9934795b1dc0b2fe /arch/arm/plat-s3c64xx | |
| parent | 5860a336cab7741221191f006618c244192e3176 (diff) | |
[ARM] S3C64XX: Fix MMC0 clock source register mask
Fix the definition of the MMC0 register shift and mask in the
CLKSRC register.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/plat-s3c64xx')
| -rw-r--r-- | arch/arm/plat-s3c64xx/include/plat/regs-clock.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/plat-s3c64xx/include/plat/regs-clock.h b/arch/arm/plat-s3c64xx/include/plat/regs-clock.h index 78938a5e1d2..b1082c16324 100644 --- a/arch/arm/plat-s3c64xx/include/plat/regs-clock.h +++ b/arch/arm/plat-s3c64xx/include/plat/regs-clock.h @@ -205,8 +205,8 @@ #define S3C6400_CLKSRC_MMC2_SHIFT (22) #define S3C6400_CLKSRC_MMC1_MASK (0x3 << 20) #define S3C6400_CLKSRC_MMC1_SHIFT (20) -#define S3C6400_CLKSRC_MMC0_MASK (0xf << 1) -#define S3C6400_CLKSRC_MMC0_SHIFT (1) +#define S3C6400_CLKSRC_MMC0_MASK (0x3 << 18) +#define S3C6400_CLKSRC_MMC0_SHIFT (18) #define S3C6400_CLKSRC_SPI1_MASK (0x3 << 16) #define S3C6400_CLKSRC_SPI1_SHIFT (16) #define S3C6400_CLKSRC_SPI0_MASK (0x3 << 14) |