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authorAndy Green <andy@openmoko.com>2009-02-25 11:05:19 +0000
committerAndy Green <agreen@octopus.localdomain>2009-02-25 11:05:19 +0000
commit7b9a8d65a597efaba8c54ac3eaa4f8d3f3c482e1 (patch)
tree2443a58da904ac18fa634686e245219f66ff7808 /arch/arm
parentb9aa5bf345a0b802af0d10b6cf1079738fe4fd12 (diff)
add-s3c64xx-tzic.patch
This adds in the TZIC support consts and also the VM mapping for the TZIC units, and adds TZIC init into mach-om-gta03.c Signed-off-by: Andy Green <andy@openmoko.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/include/asm/hardware/tzic-sp890.h22
-rw-r--r--arch/arm/mach-s3c6400/include/mach/map.h4
-rw-r--r--arch/arm/mach-s3c6410/mach-om-gta03.c19
-rw-r--r--arch/arm/plat-s3c64xx/cpu.c12
4 files changed, 51 insertions, 6 deletions
diff --git a/arch/arm/include/asm/hardware/tzic-sp890.h b/arch/arm/include/asm/hardware/tzic-sp890.h
new file mode 100644
index 00000000000..5ffd661b219
--- /dev/null
+++ b/arch/arm/include/asm/hardware/tzic-sp890.h
@@ -0,0 +1,22 @@
+#ifndef __SP890_TZIC_H__
+#define __SP890_TZIC_H__
+
+#define SP890_TZIC_UNLOCK_MAGIC (0x0ACCE550)
+
+#define SP890_TZIC_FIQSTATUS 0
+#define SP890_TZIC_RAWINTR 4
+#define SP890_TZIC_INTSELECT 8
+#define SP890_TZIC_FIQENABLE 0xc
+#define SP890_TZIC_FIQENCLEAR 0x10
+#define SP890_TZIC_FIQBYPASS 0x14
+#define SP890_TZIC_PROTECTION 0x18
+#define SP890_TZIC_LOCK 0x1c
+#define SP890_TZIC_LOCKSTATUS 0x20
+#define SP890_TZIC_ITCR 0x300
+#define SP890_TZIC_ITIP1 0x304
+#define SP890_TZIC_ITIP2 0x308
+#define SP890_TZIC_ITOP1 0x30c
+#define SP890_TZIC_ITOP2 0x310
+#define SP890_TZIC_PERIPHIDO 0xfe0
+
+#endif
diff --git a/arch/arm/mach-s3c6400/include/mach/map.h b/arch/arm/mach-s3c6400/include/mach/map.h
index d0bcc2652f1..70bc211d125 100644
--- a/arch/arm/mach-s3c6400/include/mach/map.h
+++ b/arch/arm/mach-s3c6400/include/mach/map.h
@@ -51,6 +51,8 @@
#define S3C64XX_SZ_GPIO SZ_4K
#define S3C64XX_PA_SDRAM (0x50000000)
+#define S3C64XX_PA_TZIC0 (0x71000000)
+#define S3C64XX_PA_TZIC1 (0x71100000)
#define S3C64XX_PA_VIC0 (0x71200000)
#define S3C64XX_PA_VIC1 (0x71300000)
@@ -60,6 +62,8 @@
/* place VICs close together */
#define S3C_VA_VIC0 (S3C_VA_IRQ + 0x00)
#define S3C_VA_VIC1 (S3C_VA_IRQ + 0x10000)
+#define S3C_VA_TZIC0 (S3C_VA_IRQ + 0x20000)
+#define S3C_VA_TZIC1 (S3C_VA_IRQ + 0x30000)
/* compatibiltiy defines. */
#define S3C_PA_TIMER S3C64XX_PA_TIMER
diff --git a/arch/arm/mach-s3c6410/mach-om-gta03.c b/arch/arm/mach-s3c6410/mach-om-gta03.c
index 165cb7a4019..596b01ff765 100644
--- a/arch/arm/mach-s3c6410/mach-om-gta03.c
+++ b/arch/arm/mach-s3c6410/mach-om-gta03.c
@@ -43,7 +43,8 @@
#include <asm/mach/irq.h>
#include <mach/hardware.h>
-#include <asm/hardware/vic.h>
+#include <asm/hardware/vic.h>
+#include <asm/hardware/tzic-sp890.h>
#include <mach/map.h>
#include <mach/regs-fb.h>
#include <mach/spi-gpio.h>
@@ -65,6 +66,7 @@
#include <plat/clock.h>
#include <plat/devs.h>
#include <plat/cpu.h>
+#include <plat/tzic-sp890.h>
/* #include <plat/udc.h> */
#include <linux/i2c.h>
@@ -108,6 +110,8 @@ static int gta03_fiq_irq;
#define S3C6410_INTMSK (S3C_VA_VIC0 + VIC_INT_ENABLE)
#define S3C6410_INTMOD (S3C_VA_VIC0 + VIC_INT_SELECT)
+
+
static void gta03_fiq_handler(void)
{
u16 divisor = 0xffff;
@@ -190,16 +194,21 @@ static int gta03_fiq_enable(void)
gta03_fiq_pwm_timer.counter = gta03_fiq_pwm_timer.comparer = 3000;
rc = s3c2410_pwm_enable(&gta03_fiq_pwm_timer);
- if (rc)
+ if (rc)
goto bail;
s3c2410_pwm_start(&gta03_fiq_pwm_timer);
/* let our selected interrupt be a magic FIQ interrupt */
- __raw_writel(1 << 27, S3C6410_INTMSK + 4);
+ __raw_writel(gta03_fiq_mod_mask, S3C6410_INTMSK + 4);
__raw_writel(gta03_fiq_mod_mask, S3C6410_INTMOD);
- __raw_writel((__raw_readl(S3C64XX_TINT_CSTAT) & 0x1f)| 1 << 3, S3C64XX_TINT_CSTAT);
- __raw_writel(1 << 27, S3C6410_INTMSK);
+ __raw_writel((__raw_readl(S3C64XX_TINT_CSTAT) & 0x1f)| 1 << 3,
+ S3C64XX_TINT_CSTAT);
+ __raw_writel(gta03_fiq_mod_mask, S3C6410_INTMSK);
+
+ __raw_writel(SP890_TZIC_UNLOCK_MAGIC, S3C64XX_VA_TZIC0_LOCK);
+ __raw_writel(gta03_fiq_mod_mask, S3C64XX_VA_TZIC0_FIQENABLE);
+ __raw_writel(gta03_fiq_mod_mask, S3C64XX_VA_TZIC0_INTSELECT);
/* it's ready to go as soon as we unmask the source in S3C2410_INTMSK */
local_fiq_enable();
diff --git a/arch/arm/plat-s3c64xx/cpu.c b/arch/arm/plat-s3c64xx/cpu.c
index f9fdaab32ab..5cda43bc833 100644
--- a/arch/arm/plat-s3c64xx/cpu.c
+++ b/arch/arm/plat-s3c64xx/cpu.c
@@ -102,7 +102,17 @@ static struct map_desc s3c_iodesc[] __initdata = {
.pfn = __phys_to_pfn(S3C64XX_PA_MODEM),
.length = SZ_4K,
.type = MT_DEVICE,
- },
+ }, {
+ .virtual = (unsigned long)S3C_VA_TZIC0,
+ .pfn = __phys_to_pfn(S3C64XX_PA_TZIC0),
+ .length = SZ_4K,
+ .type = MT_DEVICE,
+ }, {
+ .virtual = (unsigned long)S3C_VA_TZIC1,
+ .pfn = __phys_to_pfn(S3C64XX_PA_TZIC1),
+ .length = SZ_4K,
+ .type = MT_DEVICE,
+ }
};