diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2008-08-28 12:34:01 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-08-28 12:34:01 -0700 |
commit | 604a2785a8482cad4d63202465133c720db5eda7 (patch) | |
tree | e2f510a8a54d7d4443cb52f3a0be46f527ebb779 /arch/blackfin/include/asm/time.h | |
parent | 66833d5f3934a19d0988b7d0de58149bfd7a5884 (diff) | |
parent | d310fb4bb73629840430cb13cb282915e49fef4b (diff) |
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6:
Blackfin arch: Fix PM building on BF52x: No ROTWE on BF52x, add USBWE
Blackfin arch: sram: use 'unsigned long' for irqflags
Blackfin arch: let PCI depend on BROKEN
Blackfin arch: move include/asm-blackfin header files to arch/blackfin
Blackfin arch: fix bug - MPU crashes under stress
Blackfin arch: Fix bug - when to rmmod the L1_module, it stucks and then reboot the board.
Blackfin arch: dont actually need to muck with EMAC_SYSTAT for BF52x for demuxing
Blackfin arch: Add MTD Partitions for MTD_DATAFLASH, increase max SPI SCLK
Diffstat (limited to 'arch/blackfin/include/asm/time.h')
-rw-r--r-- | arch/blackfin/include/asm/time.h | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/arch/blackfin/include/asm/time.h b/arch/blackfin/include/asm/time.h new file mode 100644 index 00000000000..ddc43ce3853 --- /dev/null +++ b/arch/blackfin/include/asm/time.h @@ -0,0 +1,40 @@ +/* + * asm-blackfin/time.h: + * + * Copyright 2004-2008 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +#ifndef _ASM_BLACKFIN_TIME_H +#define _ASM_BLACKFIN_TIME_H + +/* + * The way that the Blackfin core timer works is: + * - CCLK is divided by a programmable 8-bit pre-scaler (TSCALE) + * - Every time TSCALE ticks, a 32bit is counted down (TCOUNT) + * + * If you take the fastest clock (1ns, or 1GHz to make the math work easier) + * 10ms is 10,000,000 clock ticks, which fits easy into a 32-bit counter + * (32 bit counter is 4,294,967,296ns or 4.2 seconds) so, we don't need + * to use TSCALE, and program it to zero (which is pass CCLK through). + * If you feel like using it, try to keep HZ * TIMESCALE to some + * value that divides easy (like power of 2). + */ + +#ifndef CONFIG_CPU_FREQ +#define TIME_SCALE 1 +#define __bfin_cycles_off (0) +#define __bfin_cycles_mod (0) +#else +/* + * Blackfin CPU frequency scaling supports max Core Clock 1, 1/2 and 1/4 . + * Whenever we change the Core Clock frequency changes we immediately + * adjust the Core Timer Presale Register. This way we don't lose time. + */ +#define TIME_SCALE 4 +extern unsigned long long __bfin_cycles_off; +extern unsigned int __bfin_cycles_mod; +#endif + +#endif |