diff options
author | James Morris <jmorris@namei.org> | 2008-09-21 17:41:56 -0700 |
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committer | James Morris <jmorris@namei.org> | 2008-09-21 17:41:56 -0700 |
commit | ab2b49518e743962f71b94246855c44ee9cf52cc (patch) | |
tree | 26b260a350f0a0a0d19b558bf147b812e3a1564c /arch/blackfin/mach-bf537/include/mach/dma.h | |
parent | f058925b201357fba48d56cc9c1719ae274b2022 (diff) | |
parent | 72d31053f62c4bc464c2783974926969614a8649 (diff) |
Merge branch 'master' into next
Conflicts:
MAINTAINERS
Thanks for breaking my tree :-)
Signed-off-by: James Morris <jmorris@namei.org>
Diffstat (limited to 'arch/blackfin/mach-bf537/include/mach/dma.h')
-rw-r--r-- | arch/blackfin/mach-bf537/include/mach/dma.h | 55 |
1 files changed, 55 insertions, 0 deletions
diff --git a/arch/blackfin/mach-bf537/include/mach/dma.h b/arch/blackfin/mach-bf537/include/mach/dma.h new file mode 100644 index 00000000000..7a964040870 --- /dev/null +++ b/arch/blackfin/mach-bf537/include/mach/dma.h @@ -0,0 +1,55 @@ +/* + * file: include/asm-blackfin/mach-bf537/dma.h + * based on: + * author: + * + * created: + * description: + * system mmr register map + * rev: + * + * modified: + * + * + * bugs: enter bugs at http://blackfin.uclinux.org/ + * + * this program is free software; you can redistribute it and/or modify + * it under the terms of the gnu general public license as published by + * the free software foundation; either version 2, or (at your option) + * any later version. + * + * this program is distributed in the hope that it will be useful, + * but without any warranty; without even the implied warranty of + * merchantability or fitness for a particular purpose. see the + * gnu general public license for more details. + * + * you should have received a copy of the gnu general public license + * along with this program; see the file copying. + * if not, write to the free software foundation, + * 59 temple place - suite 330, boston, ma 02111-1307, usa. + */ + +#ifndef _MACH_DMA_H_ +#define _MACH_DMA_H_ + +#define MAX_BLACKFIN_DMA_CHANNEL 16 + +#define CH_PPI 0 +#define CH_EMAC_RX 1 +#define CH_EMAC_TX 2 +#define CH_SPORT0_RX 3 +#define CH_SPORT0_TX 4 +#define CH_SPORT1_RX 5 +#define CH_SPORT1_TX 6 +#define CH_SPI 7 +#define CH_UART0_RX 8 +#define CH_UART0_TX 9 +#define CH_UART1_RX 10 +#define CH_UART1_TX 11 + +#define CH_MEM_STREAM0_DEST 12 /* TX */ +#define CH_MEM_STREAM0_SRC 13 /* RX */ +#define CH_MEM_STREAM1_DEST 14 /* TX */ +#define CH_MEM_STREAM1_SRC 15 /* RX */ + +#endif |