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authorMike Frysinger <vapier.adi@gmail.com>2009-03-04 17:36:49 +0800
committerBryan Wu <cooloney@kernel.org>2009-03-04 17:36:49 +0800
commitc18e99cfba746ab0ad8d45e1f351ed990947c58c (patch)
tree66f7ad4249cd16ce99a933c0fb01dddbd60c95d4 /arch/blackfin/mach-bf537
parentff19fed4fe54f2f1dd439ac02969333ea9a9b4ff (diff)
Blackfin arch: update anomaly sheets to match latest public info
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch/blackfin/mach-bf537')
-rw-r--r--arch/blackfin/mach-bf537/include/mach/anomaly.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/blackfin/mach-bf537/include/mach/anomaly.h b/arch/blackfin/mach-bf537/include/mach/anomaly.h
index fe1ae4c75cd..438b43ffd41 100644
--- a/arch/blackfin/mach-bf537/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf537/include/mach/anomaly.h
@@ -2,7 +2,7 @@
* File: include/asm-blackfin/mach-bf537/anomaly.h
* Bugs: Enter bugs at http://blackfin.uclinux.org/
*
- * Copyright (C) 2004-2008 Analog Devices Inc.
+ * Copyright (C) 2004-2009 Analog Devices Inc.
* Licensed under the GPL-2 or later.
*/
@@ -110,7 +110,7 @@
#define ANOMALY_05000301 (1)
/* SSYNCs After Writes To CAN/DMA MMR Registers Are Not Always Handled Correctly */
#define ANOMALY_05000304 (__SILICON_REVISION__ < 3)
-/* New Feature: Additional Hysteresis on SPORT Input Pins (Not Available On Older Silicon) */
+/* SPORT_HYS Bit in PLL_CTL Register Is Not Functional */
#define ANOMALY_05000305 (__SILICON_REVISION__ < 3)
/* SCKELOW Bit Does Not Maintain State Through Hibernate */
#define ANOMALY_05000307 (__SILICON_REVISION__ < 3)