Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin: (75 commits)
  Blackfin: update ftrace for latest toolchain
  Blackfin: fix elf_fpregset_t definition
  Blackfin: unify cache init functions
  Blackfin: swap clocksource ratings for gptimer/cycles
  Blackfin: update ftrace_push_return_trace() breakage
  Blackfin: update cm board resources
  Blackfin: cm-bf537u: split board from cm-bf537e
  Blackfin: bf538-ezkit: add SPI IRQ resources
  Blackfin: increase default async timings for parallel flashes
  Blackfin: add ICPLB coverage for async banks
  Blackfin: use KERN_ALERT in all kgdb_test output
  Blackfin: fix BF54x SPI CS resources
  Blackfin: fix typo in isram_write()
  Blackfin: bf537-stamp: add adp5588 gpio resources
  Blackfin: add some isram-driver self tests
  Blackfin: workaround anomaly 05000283
  Blackfin: fix spelling in a few comments
  Blackfin: use raw_smp_processor_id() in exception code
  Blackfin: remove useless duplicated assignment in gpio code
  Blackfin: Fix link errors with binutils 2.19 and GCC 4.3
  ...

1 files changed, 0 insertions, 89 deletions

diff --git a/arch/blackfin/mach-bf548/include/mach/blackfin.h b/arch/blackfin/mach-bf548/include/mach/blackfin.h
index 6b97396d817..318667b2f03 100644
--- a/arch/blackfin/mach-bf548/include/mach/blackfin.h
+++ b/arch/blackfin/mach-bf548/include/mach/blackfin.h
@@ -72,97 +72,8 @@
 #include "cdefBF549.h"
 #endif
 
-/* UART 1*/
-#define bfin_read_UART_THR()		bfin_read_UART1_THR()
-#define bfin_write_UART_THR(val)	bfin_write_UART1_THR(val)
-#define bfin_read_UART_RBR()		bfin_read_UART1_RBR()
-#define bfin_write_UART_RBR(val)	bfin_write_UART1_RBR(val)
-#define bfin_read_UART_DLL()		bfin_read_UART1_DLL()
-#define bfin_write_UART_DLL(val)	bfin_write_UART1_DLL(val)
-#define bfin_read_UART_IER()		bfin_read_UART1_IER()
-#define bfin_write_UART_IER(val)	bfin_write_UART1_IER(val)
-#define bfin_read_UART_DLH()		bfin_read_UART1_DLH()
-#define bfin_write_UART_DLH(val)	bfin_write_UART1_DLH(val)
-#define bfin_read_UART_IIR()		bfin_read_UART1_IIR()
-#define bfin_write_UART_IIR(val)	bfin_write_UART1_IIR(val)
-#define bfin_read_UART_LCR()		bfin_read_UART1_LCR()
-#define bfin_write_UART_LCR(val)	bfin_write_UART1_LCR(val)
-#define bfin_read_UART_MCR()		bfin_read_UART1_MCR()
-#define bfin_write_UART_MCR(val)	bfin_write_UART1_MCR(val)
-#define bfin_read_UART_LSR()		bfin_read_UART1_LSR()
-#define bfin_write_UART_LSR(val)	bfin_write_UART1_LSR(val)
-#define bfin_read_UART_SCR()		bfin_read_UART1_SCR()
-#define bfin_write_UART_SCR(val)	bfin_write_UART1_SCR(val)
-#define bfin_read_UART_GCTL()		bfin_read_UART1_GCTL()
-#define bfin_write_UART_GCTL(val)	bfin_write_UART1_GCTL(val)
-
 #endif
 
-/* MAP used DEFINES from BF533 to BF54x - so we don't need to change 
- * them in the driver, kernel, etc. */
-
-/* UART_IIR Register */
-#define STATUS(x)	((x << 1) & 0x06)
-#define STATUS_P1	0x02
-#define STATUS_P0	0x01
-
-/* UART 0*/
-
-/* DMA Channel */
-#define bfin_read_CH_UART_RX()		bfin_read_CH_UART1_RX()
-#define bfin_write_CH_UART_RX(val)	bfin_write_CH_UART1_RX(val)
-#define bfin_read_CH_UART_TX()		bfin_read_CH_UART1_TX()
-#define bfin_write_CH_UART_TX(val)	bfin_write_CH_UART1_TX(val)
-#define CH_UART_RX			CH_UART1_RX
-#define CH_UART_TX			CH_UART1_TX
-
-/* System Interrupt Controller */
-#define bfin_read_IRQ_UART_RX()		bfin_read_IRQ_UART1_RX()
-#define bfin_write_IRQ_UART_RX(val)	bfin_write_IRQ_UART1_RX(val)
-#define bfin_read_IRQ_UART_TX()		bfin_read_IRQ_UART1_TX()
-#define bfin_write_IRQ_UART_TX(val)	bfin_write_IRQ_UART1_TX(val)
-#define bfin_read_IRQ_UART_ERROR()	bfin_read_IRQ_UART1_ERROR()
-#define bfin_write_IRQ_UART_ERROR(val)	bfin_write_IRQ_UART1_ERROR(val)
-#define IRQ_UART_RX			IRQ_UART1_RX
-#define	IRQ_UART_TX			IRQ_UART1_TX
-#define	IRQ_UART_ERROR			IRQ_UART1_ERROR
-
-/* MMR Registers*/
-#define bfin_read_UART_THR()		bfin_read_UART1_THR()
-#define bfin_write_UART_THR(val)	bfin_write_UART1_THR(val)
-#define bfin_read_UART_RBR()		bfin_read_UART1_RBR()
-#define bfin_write_UART_RBR(val)	bfin_write_UART1_RBR(val)
-#define bfin_read_UART_DLL()		bfin_read_UART1_DLL()
-#define bfin_write_UART_DLL(val)	bfin_write_UART1_DLL(val)
-#define bfin_read_UART_IER()		bfin_read_UART1_IER()
-#define bfin_write_UART_IER(val)	bfin_write_UART1_IER(val)
-#define bfin_read_UART_DLH()		bfin_read_UART1_DLH()
-#define bfin_write_UART_DLH(val)	bfin_write_UART1_DLH(val)
-#define bfin_read_UART_IIR()		bfin_read_UART1_IIR()
-#define bfin_write_UART_IIR(val)	bfin_write_UART1_IIR(val)
-#define bfin_read_UART_LCR()		bfin_read_UART1_LCR()
-#define bfin_write_UART_LCR(val)	bfin_write_UART1_LCR(val)
-#define bfin_read_UART_MCR()		bfin_read_UART1_MCR()
-#define bfin_write_UART_MCR(val)	bfin_write_UART1_MCR(val)
-#define bfin_read_UART_LSR()		bfin_read_UART1_LSR()
-#define bfin_write_UART_LSR(val)	bfin_write_UART1_LSR(val)
-#define bfin_read_UART_SCR()		bfin_read_UART1_SCR()
-#define bfin_write_UART_SCR(val)	bfin_write_UART1_SCR(val)
-#define bfin_read_UART_GCTL()		bfin_read_UART1_GCTL()
-#define bfin_write_UART_GCTL(val)	bfin_write_UART1_GCTL(val)
-
-#define BFIN_UART_THR			UART1_THR
-#define BFIN_UART_RBR			UART1_RBR
-#define BFIN_UART_DLL			UART1_DLL
-#define BFIN_UART_IER			UART1_IER
-#define BFIN_UART_DLH			UART1_DLH
-#define BFIN_UART_IIR			UART1_IIR
-#define BFIN_UART_LCR			UART1_LCR
-#define BFIN_UART_MCR			UART1_MCR
-#define BFIN_UART_LSR			UART1_LSR
-#define BFIN_UART_SCR			UART1_SCR
-#define BFIN_UART_GCTL			UART1_GCTL
-
 #define BFIN_UART_NR_PORTS	4
 
 #define OFFSET_DLL              0x00	/* Divisor Latch (Low-Byte)             */