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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2008-10-21 15:52:04 +1100
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2008-10-21 15:52:04 +1100
commita02efb906d12c9d4eb2ab7c59049ba9545e5412d (patch)
treebf1f6467978ec63a22f42299ecac2ee7f7e73336 /arch/h8300/kernel/timer/timer16.c
parent84dfcb4b318463cd4883b6a19937824f49aee564 (diff)
parent2515ddc6db8eb49a79f0fe5e67ff09ac7c81eab4 (diff)
Merge commit 'origin' into master
Manual merge of: arch/powerpc/Kconfig arch/powerpc/include/asm/page.h
Diffstat (limited to 'arch/h8300/kernel/timer/timer16.c')
-rw-r--r--arch/h8300/kernel/timer/timer16.c78
1 files changed, 78 insertions, 0 deletions
diff --git a/arch/h8300/kernel/timer/timer16.c b/arch/h8300/kernel/timer/timer16.c
new file mode 100644
index 00000000000..e14271b7211
--- /dev/null
+++ b/arch/h8300/kernel/timer/timer16.c
@@ -0,0 +1,78 @@
+/*
+ * linux/arch/h8300/kernel/timer/timer16.c
+ *
+ * Yoshinori Sato <ysato@users.sourcefoge.jp>
+ *
+ * 16bit Timer Handler
+ *
+ */
+
+#include <linux/errno.h>
+#include <linux/sched.h>
+#include <linux/kernel.h>
+#include <linux/param.h>
+#include <linux/string.h>
+#include <linux/mm.h>
+#include <linux/interrupt.h>
+#include <linux/init.h>
+#include <linux/timex.h>
+
+#include <asm/segment.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/regs306x.h>
+
+/* 16bit timer */
+#if CONFIG_H8300_TIMER16_CH == 0
+#define _16BASE 0xffff78
+#define _16IRQ 24
+#elif CONFIG_H8300_TIMER16_CH == 1
+#define _16BASE 0xffff80
+#define _16IRQ 28
+#elif CONFIG_H8300_TIMER16_CH == 2
+#define _16BASE 0xffff88
+#define _16IRQ 32
+#else
+#error Unknown timer channel.
+#endif
+
+#define TCR 0
+#define TIOR 1
+#define TCNT 2
+#define GRA 4
+#define GRB 6
+
+#define H8300_TIMER_FREQ CONFIG_CPU_CLOCK*10000 /* Timer input freq. */
+
+static irqreturn_t timer_interrupt(int irq, void *dev_id)
+{
+ h8300_timer_tick();
+ ctrl_bclr(CONFIG_H8300_TIMER16_CH, TISRA);
+ return IRQ_HANDLED;
+}
+
+static struct irqaction timer16_irq = {
+ .name = "timer-16",
+ .handler = timer_interrupt,
+ .flags = IRQF_DISABLED | IRQF_TIMER,
+ .mask = CPU_MASK_NONE,
+};
+
+static const int __initdata divide_rate[] = {1, 2, 4, 8};
+
+void __init h8300_timer_setup(void)
+{
+ unsigned int div;
+ unsigned int cnt;
+
+ calc_param(cnt, div, divide_rate, 0x10000);
+
+ setup_irq(_16IRQ, &timer16_irq);
+
+ /* initalize timer */
+ ctrl_outb(0, TSTR);
+ ctrl_outb(CCLR0 | div, _16BASE + TCR);
+ ctrl_outw(cnt, _16BASE + GRA);
+ ctrl_bset(4 + CONFIG_H8300_TIMER16_CH, TISRA);
+ ctrl_bset(CONFIG_H8300_TIMER16_CH, TSTR);
+}