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authorde Dinechin, Christophe (Integrity VM) <christophe.de-dinechin@hp.com>2007-12-13 15:03:07 +0000
committerTony Luck <tony.luck@intel.com>2007-12-18 16:56:50 -0800
commitaec103bfa60e9f72bd66a144236592f54b986a03 (patch)
tree90c1cf2de8853dd6e3972f295d1aecfe3aee507a /arch/ia64/sn/pci
parent3cdc7fc7fd5bd1ead75758dfadef609a6e9fd3de (diff)
[IA64] Avoid unnecessary TLB flushes when allocating memory
Improve performance of memory allocations on ia64 by avoiding a global TLB purge to purge a single page from the file cache. This happens whenever we evict a page from the buffer cache to make room for some other allocation. Test case: Run 'find /usr -type f | xargs cat > /dev/null' in the background to fill the buffer cache, then run something that uses memory, e.g. 'gmake -j50 install'. Instrumentation showed that the number of global TLB purges went from a few millions down to about 170 over a 12 hours run of the above. The performance impact is particularly noticeable under virtualization, because a virtual TLB is generally both larger and slower to purge than a physical one. Signed-off-by: Christophe de Dinechin <ddd@hp.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'arch/ia64/sn/pci')
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