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author | merge <null@invalid> | 2009-02-06 00:22:54 +0000 |
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committer | Andy Green <agreen@octopus.localdomain> | 2009-02-06 00:22:54 +0000 |
commit | d1dcdf5718977c93805f9300b6c79f039db84c8b (patch) | |
tree | 58a161db6cf8953e33c1c9294a9c720a1aa0ad76 /arch/m68k/include/asm/serial.h | |
parent | 9029dff1f370018665a6e2999632a34fd0518f4d (diff) |
MERGE-via-pending-tracking-hist-MERGE-via-stable-tracking-MERGE-via-mokopatches-tracking-MERGE-via-master-MERGE-via-master-hist-1232625318-1233879011-1233879414-1233879505
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From: merge <null@invalid>
MERGE-via-stable-tracking-hist-MERGE-via-mokopatches-tracking-MERGE-via-master-MERGE-via-master-hist-1232625318-1233879011-1233879414
stable-tracking-hist top was MERGE-via-mokopatches-tracking-MERGE-via-master-MERGE-via-master-hist-1232625318-1233879011-1233879414 / 71be0a45396066b1f8f27f8f4f87937247a129e1 ... parent commitmessage:
From: merge <null@invalid>
MERGE-via-mokopatches-tracking-hist-MERGE-via-master-MERGE-via-master-hist-1232625318-1233879011
mokopatches-tracking-hist top was MERGE-via-master-MERGE-via-master-hist-1232625318-1233879011 / 1be1b01373f572a02c6f1f99863c8c11ed2f9f5b ... parent commitmessage:
From: merge <null@invalid>
MERGE-via-master-MERGE-via-master-hist-1232625318
master top was MERGE-via-master-hist-1232625318 / dd4b117123ae66451695810017eb72fbdfc05df5 ... parent commitmessage:
From: merge <null@invalid>
MERGE-master-patchset-edits
Diffstat (limited to 'arch/m68k/include/asm/serial.h')
-rw-r--r-- | arch/m68k/include/asm/serial.h | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/arch/m68k/include/asm/serial.h b/arch/m68k/include/asm/serial.h new file mode 100644 index 00000000000..2b90d6e6907 --- /dev/null +++ b/arch/m68k/include/asm/serial.h @@ -0,0 +1,33 @@ +/* + * include/asm-m68k/serial.h + * + * currently this seems useful only for a Q40, + * it's an almost exact copy of ../asm-alpha/serial.h + * + */ + + +/* + * This assumes you have a 1.8432 MHz clock for your UART. + * + * It'd be nice if someone built a serial card with a 24.576 MHz + * clock, since the 16550A is capable of handling a top speed of 1.5 + * megabits/second; but this requires the faster clock. + */ +#define BASE_BAUD ( 1843200 / 16 ) + +/* Standard COM flags (except for COM4, because of the 8514 problem) */ +#ifdef CONFIG_SERIAL_DETECT_IRQ +#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ) +#define STD_COM4_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_AUTO_IRQ) +#else +#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST) +#define STD_COM4_FLAGS ASYNC_BOOT_AUTOCONF +#endif + +#define SERIAL_PORT_DFNS \ + /* UART CLK PORT IRQ FLAGS */ \ + { 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS }, /* ttyS0 */ \ + { 0, BASE_BAUD, 0x2F8, 3, STD_COM_FLAGS }, /* ttyS1 */ \ + { 0, BASE_BAUD, 0x3E8, 4, STD_COM_FLAGS }, /* ttyS2 */ \ + { 0, BASE_BAUD, 0x2E8, 3, STD_COM4_FLAGS }, /* ttyS3 */ |