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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2008-10-15 23:16:07 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-10-15 23:16:07 +0100
commit2502991560dc8244dbe10e48473d85722c1e2ec1 (patch)
tree63b1f3be2ed56ff06f1e8db709e4ce85d69c3add /arch/mips/include/asm/mach-ip32/war.h
parent7e69a8c4d06b7ecb874f571e82b715a9f79bc3c4 (diff)
parenta9ff8f6462635c8d9f8d64b7b10ddcea8404d77b (diff)
Merge branch 'fixes' into for-linus
Conflicts: arch/arm/mach-versatile/core.c
Diffstat (limited to 'arch/mips/include/asm/mach-ip32/war.h')
-rw-r--r--arch/mips/include/asm/mach-ip32/war.h25
1 files changed, 25 insertions, 0 deletions
diff --git a/arch/mips/include/asm/mach-ip32/war.h b/arch/mips/include/asm/mach-ip32/war.h
new file mode 100644
index 00000000000..d194056dcd7
--- /dev/null
+++ b/arch/mips/include/asm/mach-ip32/war.h
@@ -0,0 +1,25 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
+ */
+#ifndef __ASM_MIPS_MACH_IP32_WAR_H
+#define __ASM_MIPS_MACH_IP32_WAR_H
+
+#define R4600_V1_INDEX_ICACHEOP_WAR 0
+#define R4600_V1_HIT_CACHEOP_WAR 0
+#define R4600_V2_HIT_CACHEOP_WAR 0
+#define R5432_CP0_INTERRUPT_WAR 0
+#define BCM1250_M3_WAR 0
+#define SIBYTE_1956_WAR 0
+#define MIPS4K_ICACHE_REFILL_WAR 0
+#define MIPS_CACHE_SYNC_WAR 0
+#define TX49XX_ICACHE_INDEX_INV_WAR 0
+#define RM9000_CDEX_SMP_WAR 0
+#define ICACHE_REFILLS_WORKAROUND_WAR 1
+#define R10000_LLSC_WAR 0
+#define MIPS34K_MISSED_ITLB_WAR 0
+
+#endif /* __ASM_MIPS_MACH_IP32_WAR_H */