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authorChris Dearman <chris@mips.com>2009-07-10 01:51:27 -0700
committerRalf Baechle <ralf@linux-mips.org>2009-11-02 12:00:05 +0100
commita074f0e89faa8989bdbd6110785d2aafe7df5285 (patch)
tree8b2737e591a214834e79d3bcee8d5a652b49e2df /arch/mips/kernel
parenta4e7cac18f074fa55142bc86cc35a74f3c6ea615 (diff)
MIPS: SPRAM: Clean up support code a little
Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel')
-rw-r--r--arch/mips/kernel/cpu-probe.c8
-rw-r--r--arch/mips/kernel/spram.c4
2 files changed, 2 insertions, 10 deletions
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index f709657e4dc..7a51866068a 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -23,7 +23,7 @@
#include <asm/mipsregs.h>
#include <asm/system.h>
#include <asm/watch.h>
-
+#include <asm/spram.h>
/*
* Not all of the MIPS CPUs have the "wait" instruction available. Moreover,
* the implementation of the "wait" feature differs between CPU families. This
@@ -711,12 +711,6 @@ static void __cpuinit decode_configs(struct cpuinfo_mips *c)
mips_probe_watch_registers(c);
}
-#ifdef CONFIG_CPU_MIPSR2
-extern void spram_config(void);
-#else
-static inline void spram_config(void) {}
-#endif
-
static inline void cpu_probe_mips(struct cpuinfo_mips *c, unsigned int cpu)
{
decode_configs(c);
diff --git a/arch/mips/kernel/spram.c b/arch/mips/kernel/spram.c
index 71b47376cf7..1821d12a641 100644
--- a/arch/mips/kernel/spram.c
+++ b/arch/mips/kernel/spram.c
@@ -13,7 +13,6 @@
#include <linux/ptrace.h>
#include <linux/stddef.h>
-#include <asm/cpu.h>
#include <asm/fpu.h>
#include <asm/mipsregs.h>
#include <asm/system.h>
@@ -198,8 +197,7 @@ static __cpuinit void probe_spram(char *type,
offset += 2 * SPRAM_TAG_STRIDE;
}
}
-
-__cpuinit void spram_config(void)
+void __cpuinit spram_config(void)
{
struct cpuinfo_mips *c = &current_cpu_data;
unsigned int config0;