diff options
| author | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2007-11-25 11:47:56 +0100 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2008-01-29 10:14:58 +0000 |
| commit | 930bff882296c02ca81db108672ef4ca06c37db5 (patch) | |
| tree | 53288137d4f7cc02d8ca417edb2b25221c3007cd /arch/mips/lib/strncpy_user.S | |
| parent | 2064ba23e58daa929eec6f5e7a2abc24574a95b9 (diff) | |
[MIPS] IP28: added cache barrier to assembly routines
IP28 needs special treatment to avoid speculative accesses. gcc
takes care for .c code, but for assembly code we need to do it
manually.
This is taken from Peter Fuersts IP28 patches.
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/lib/strncpy_user.S')
| -rw-r--r-- | arch/mips/lib/strncpy_user.S | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/mips/lib/strncpy_user.S b/arch/mips/lib/strncpy_user.S index 5c8fb9d6b7f..8a63f72b81d 100644 --- a/arch/mips/lib/strncpy_user.S +++ b/arch/mips/lib/strncpy_user.S @@ -38,6 +38,7 @@ FEXPORT(__strncpy_from_user_nocheck_asm) .set noreorder 1: EX(lbu, t0, (v1), fault) PTR_ADDIU v1, 1 + R10KCBARRIER(0(ra)) beqz t0, 2f sb t0, (a0) PTR_ADDIU v0, 1 |