diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 2008-10-28 17:38:42 +0000 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2008-10-30 14:44:34 +0000 |
| commit | ba3049ed4086737dab200b6087138a4b8e06915d (patch) | |
| tree | 78a665064e6cc288bb34ef20cd543c2feb204838 /arch/mips/math-emu/dsemul.h | |
| parent | 076c6e4f4d81113615f50e5bc2c569f628bcd54a (diff) | |
MIPS: Switch FPU emulator trap to BREAK instruction.
Arguably using the address error handler has always been ugly. But with
processors that handle unaligned loads and stores in hardware the
current mechanism ceases to work so switch it to a BREAK instruction and
allocate break code 514 to the FPU emulator.
Yoichi Yuasa provided a build fix for CONFIG_BUG=n.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Diffstat (limited to 'arch/mips/math-emu/dsemul.h')
| -rw-r--r-- | arch/mips/math-emu/dsemul.h | 17 |
1 files changed, 0 insertions, 17 deletions
diff --git a/arch/mips/math-emu/dsemul.h b/arch/mips/math-emu/dsemul.h deleted file mode 100644 index 091f0e76730..00000000000 --- a/arch/mips/math-emu/dsemul.h +++ /dev/null @@ -1,17 +0,0 @@ -extern int mips_dsemul(struct pt_regs *regs, mips_instruction ir, unsigned long cpc); -extern int do_dsemulret(struct pt_regs *xcp); - -/* Instruction which will always cause an address error */ -#define AdELOAD 0x8c000001 /* lw $0,1($0) */ -/* Instruction which will plainly cause a CP1 exception when FPU is disabled */ -#define CP1UNDEF 0x44400001 /* cfc1 $0,$0 undef */ - -/* Instruction inserted following the badinst to further tag the sequence */ -#define BD_COOKIE 0x0000bd36 /* tne $0,$0 with baggage */ - -/* Setup which instruction to use for trampoline */ -#ifdef STANDALONE_EMULATOR -#define BADINST CP1UNDEF -#else -#define BADINST AdELOAD -#endif |