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authorRalf Baechle <ralf@linux-mips.org>2005-02-06 21:55:49 +0000
committerRalf Baechle <ralf@linux-mips.org>2005-10-29 19:30:26 +0100
commitae6aafe30917c4c9f3533471d491b5e7c2fbe61a (patch)
treeae1a7c88853a2f9d982db41f80f7235ce37b4f50 /arch/mips/mm
parent0efe27617e67448dfe78e7cebde3a6f9eadf1223 (diff)
Move missplaced code line to the right place.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mm')
-rw-r--r--arch/mips/mm/c-r4k.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index 1466c497bea..726e899486a 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -1012,15 +1012,14 @@ static void __init probe_pcache(void)
* with that for us so we don't need to take care ourselves.
*/
switch (c->cputype) {
- if (c->dcache.waysize > PAGE_SIZE)
-
case CPU_R10000:
case CPU_R12000:
break;
case CPU_24K:
if (!(read_c0_config7() & (1 << 16)))
default:
- c->dcache.flags |= MIPS_CACHE_ALIASES;
+ if (c->dcache.waysize > PAGE_SIZE)
+ c->dcache.flags |= MIPS_CACHE_ALIASES;
}
switch (c->cputype) {