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author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-05-11 09:59:50 -0700 |
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committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-05-11 09:59:50 -0700 |
commit | f2c60ed038dedcc43a0eb3ef4e0602741ba90384 (patch) | |
tree | 1d06b6c080e1c164d87b66f8cc4b13203378b85a /arch/mips/pci/pci-ocelot-g.c | |
parent | cabca0cb0d0e8579428d8f8c3f606e2f01d26d14 (diff) | |
parent | 3f2d560e9029ec0b7edf8be0c32425f4bb57d582 (diff) |
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (28 commits)
[MIPS] Rework cobalt_board_id
[MIPS] Use RTC_CMOS for Cobalt
[MIPS] Use platform_device for Cobalt UART
[MIPS] Separate Alchemy processor based boards config
[MIPS] Fix build error in atomic64_cmpxchg
[MIPS] Run checksyscalls for N32 and O32 ABI
[MIPS] tlbex: use __maybe_unused
[MIPS] excite: use __maybe_unused
[MIPS] Add extern cobalt_board_id
[MIPS] Remove unused CONFIG_TOSHIBA_BOARDS
[MIPS] Rename tb0229_defconfig to tb0219_defconfig
[MIPS] Update tb0229_defconfig; add CONFIG_GPIO_TB0219.
[MIPS] Add minimum defconfig for RBHMA4200
[MIPS] SB1: Build fix.
[MIPS] Drop __devinit tag from allocate_irqno() and free_irqno()
[MIPS] clocksource: use CLOCKSOURCE_MASK() macro
[MIPS] Remove LIMITED_DMA support
[MIPS] Remove Momenco Jaguar ATX support
[MIPS] Remove Momenco Ocelot G support
[MIPS] FPU hazard handling
...
Diffstat (limited to 'arch/mips/pci/pci-ocelot-g.c')
-rw-r--r-- | arch/mips/pci/pci-ocelot-g.c | 97 |
1 files changed, 0 insertions, 97 deletions
diff --git a/arch/mips/pci/pci-ocelot-g.c b/arch/mips/pci/pci-ocelot-g.c deleted file mode 100644 index 1e3430154fa..00000000000 --- a/arch/mips/pci/pci-ocelot-g.c +++ /dev/null @@ -1,97 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org) - * - * This doesn't really fly - but I don't have a GT64240 system for testing. - */ -#include <linux/init.h> -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/pci.h> -#include <asm/gt64240.h> - -/* - * We assume these address ranges have been programmed into the GT-64240 by - * the firmware. PMON in case of the Ocelot G does that. Note the size of - * the I/O range is completly stupid; I/O mappings are limited to at most - * 256 bytes by the PCI spec and deprecated; and just to make things worse - * apparently many devices don't decode more than 64k of I/O space. - */ - -#define gt_io_size 0x20000000UL -#define gt_io_base 0xe0000000UL - -static struct resource gt_pci_mem0_resource = { - .name = "MV64240 PCI0 MEM", - .start = 0xc0000000UL, - .end = 0xcfffffffUL, - .flags = IORESOURCE_MEM -}; - -static struct resource gt_pci_io_mem0_resource = { - .name = "MV64240 PCI0 IO MEM", - .start = 0xe0000000UL, - .end = 0xefffffffUL, - .flags = IORESOURCE_IO -}; - -static struct mv_pci_controller gt_bus0_controller = { - .pcic = { - .pci_ops = &mv_pci_ops, - .mem_resource = >_pci_mem0_resource, - .mem_offset = 0xc0000000UL, - .io_resource = >_pci_io_mem0_resource, - .io_offset = 0x00000000UL - }, - .config_addr = PCI_0CONFIGURATION_ADDRESS, - .config_vreg = PCI_0CONFIGURATION_DATA_VIRTUAL_REGISTER, -}; - -static struct resource gt_pci_mem1_resource = { - .name = "MV64240 PCI1 MEM", - .start = 0xd0000000UL, - .end = 0xdfffffffUL, - .flags = IORESOURCE_MEM -}; - -static struct resource gt_pci_io_mem1_resource = { - .name = "MV64240 PCI1 IO MEM", - .start = 0xf0000000UL, - .end = 0xffffffffUL, - .flags = IORESOURCE_IO -}; - -static struct mv_pci_controller gt_bus1_controller = { - .pcic = { - .pci_ops = &mv_pci_ops, - .mem_resource = >_pci_mem1_resource, - .mem_offset = 0xd0000000UL, - .io_resource = >_pci_io_mem1_resource, - .io_offset = 0x10000000UL - }, - .config_addr = PCI_1CONFIGURATION_ADDRESS, - .config_vreg = PCI_1CONFIGURATION_DATA_VIRTUAL_REGISTER, -}; - -static __init int __init ocelot_g_pci_init(void) -{ - unsigned long io_v_base; - - if (gt_io_size) { - io_v_base = (unsigned long) ioremap(gt_io_base, gt_io_size); - if (!io_v_base) - panic("Could not ioremap I/O port range"); - - set_io_port_base(io_v_base); - } - - register_pci_controller(>_bus0_controller.pcic); - register_pci_controller(>_bus1_controller.pcic); - - return 0; -} - -arch_initcall(ocelot_g_pci_init); |