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authorDan Williams <dan.j.williams@intel.com>2008-10-24 10:21:45 -0700
committerDan Williams <dan.j.williams@intel.com>2008-10-24 10:21:45 -0700
commit6bee00dbbcb1e9feb0510e9a7104b4af00adc574 (patch)
treedd0b20bbbe353ece29a78a75b155e6d8bbd2c86e /arch/mips/rb532/setup.c
parente013e13bf605b9e6b702adffbe2853cfc60e7806 (diff)
[ARM] xsc3: revert writethrough memory-type encoding change
Commit 40df2d1d "[ARM] Update Xscale and Xscale3 PTE mappings" was fingered by git-bisect for a boot failure on iop13xx. The change made L_PTE_MT_WRITETHROUGH mappings L2-uncacheable. Russell points out that this mapping is used for the vector page. Given the regression, and the fact this page is used often, restore the old behaviour. Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'arch/mips/rb532/setup.c')
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