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authorRalf Baechle <ralf@linux-mips.org>2007-11-01 01:57:55 +0000
committerRalf Baechle <ralf@linux-mips.org>2007-11-02 16:13:47 +0000
commit217dd11e9d0442767fa13c9c188be0b92dc93d7e (patch)
tree9557e15fbad397fcc5a707e85cf1a68132ee6c31 /arch/mips/sibyte/Kconfig
parentf3f9ad0edcc1b7bf154bb34fe3b3f71e5379c9f0 (diff)
[MIPS] Sibyte: Split and move clock code.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/sibyte/Kconfig')
-rw-r--r--arch/mips/sibyte/Kconfig14
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/mips/sibyte/Kconfig b/arch/mips/sibyte/Kconfig
index e8fb880272b..366b19d33f7 100644
--- a/arch/mips/sibyte/Kconfig
+++ b/arch/mips/sibyte/Kconfig
@@ -1,5 +1,7 @@
config SIBYTE_SB1250
bool
+ select CEVT_SB1250
+ select CSRC_SB1250
select HW_HAS_PCI
select IRQ_CPU
select SIBYTE_ENABLE_LDT_IF_PCI
@@ -9,6 +11,8 @@ config SIBYTE_SB1250
config SIBYTE_BCM1120
bool
+ select CEVT_SB1250
+ select CSRC_SB1250
select IRQ_CPU
select SIBYTE_BCM112X
select SIBYTE_HAS_ZBUS_PROFILING
@@ -16,6 +20,8 @@ config SIBYTE_BCM1120
config SIBYTE_BCM1125
bool
+ select CEVT_SB1250
+ select CSRC_SB1250
select HW_HAS_PCI
select IRQ_CPU
select SIBYTE_BCM112X
@@ -24,6 +30,8 @@ config SIBYTE_BCM1125
config SIBYTE_BCM1125H
bool
+ select CEVT_SB1250
+ select CSRC_SB1250
select HW_HAS_PCI
select IRQ_CPU
select SIBYTE_BCM112X
@@ -33,12 +41,16 @@ config SIBYTE_BCM1125H
config SIBYTE_BCM112X
bool
+ select CEVT_SB1250
+ select CSRC_SB1250
select IRQ_CPU
select SIBYTE_SB1xxx_SOC
select SIBYTE_HAS_ZBUS_PROFILING
config SIBYTE_BCM1x80
bool
+ select CEVT_BCM1480
+ select CSRC_BCM1480
select HW_HAS_PCI
select IRQ_CPU
select SIBYTE_HAS_ZBUS_PROFILING
@@ -47,6 +59,8 @@ config SIBYTE_BCM1x80
config SIBYTE_BCM1x55
bool
+ select CEVT_BCM1480
+ select CSRC_BCM1480
select HW_HAS_PCI
select IRQ_CPU
select SIBYTE_SB1xxx_SOC