diff options
author | Ben Dooks <ben-linux@fluff.org> | 2008-10-21 11:12:00 +0100 |
---|---|---|
committer | Ben Dooks <ben-linux@fluff.org> | 2008-10-21 11:12:00 +0100 |
commit | c3380942e6699ed5b3e3f37b49ceb724b7699813 (patch) | |
tree | 516d791cdfd1c7f99a29f71e1a7bba8f75af96e1 /arch/parisc/include/asm/prefetch.h | |
parent | 0ffda6cca2c66e42d0ad65719f58c637ed180b05 (diff) | |
parent | 2515ddc6db8eb49a79f0fe5e67ff09ac7c81eab4 (diff) |
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6 into s3c64xx
Diffstat (limited to 'arch/parisc/include/asm/prefetch.h')
-rw-r--r-- | arch/parisc/include/asm/prefetch.h | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/arch/parisc/include/asm/prefetch.h b/arch/parisc/include/asm/prefetch.h new file mode 100644 index 00000000000..c5edc60c059 --- /dev/null +++ b/arch/parisc/include/asm/prefetch.h @@ -0,0 +1,39 @@ +/* + * include/asm-parisc/prefetch.h + * + * PA 2.0 defines data prefetch instructions on page 6-11 of the Kane book. + * In addition, many implementations do hardware prefetching of both + * instructions and data. + * + * PA7300LC (page 14-4 of the ERS) also implements prefetching by a load + * to gr0 but not in a way that Linux can use. If the load would cause an + * interruption (eg due to prefetching 0), it is suppressed on PA2.0 + * processors, but not on 7300LC. + * + */ + +#ifndef __ASM_PARISC_PREFETCH_H +#define __ASM_PARISC_PREFETCH_H + +#ifndef __ASSEMBLY__ +#ifdef CONFIG_PREFETCH + +#define ARCH_HAS_PREFETCH +static inline void prefetch(const void *addr) +{ + __asm__("ldw 0(%0), %%r0" : : "r" (addr)); +} + +/* LDD is a PA2.0 addition. */ +#ifdef CONFIG_PA20 +#define ARCH_HAS_PREFETCHW +static inline void prefetchw(const void *addr) +{ + __asm__("ldd 0(%0), %%r0" : : "r" (addr)); +} +#endif /* CONFIG_PA20 */ + +#endif /* CONFIG_PREFETCH */ +#endif /* __ASSEMBLY__ */ + +#endif /* __ASM_PARISC_PROCESSOR_H */ |