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authorKumar Gala <galak@kernel.crashing.org>2008-04-17 09:40:48 -0500
committerKumar Gala <galak@kernel.crashing.org>2008-04-17 09:40:48 -0500
commit998c610363b26f3793ad8121eeb3a749b1034824 (patch)
treef90d357678f79860fe583fced9b88c8c89806a2a /arch/powerpc/boot/dts/mpc8272ads.dts
parent280bb34bc0f7c664b59077b609ce93507a54c848 (diff)
[POWERPC] fsl: Convert dts to v1 syntax
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/boot/dts/mpc8272ads.dts')
-rw-r--r--arch/powerpc/boot/dts/mpc8272ads.dts132
1 files changed, 67 insertions, 65 deletions
diff --git a/arch/powerpc/boot/dts/mpc8272ads.dts b/arch/powerpc/boot/dts/mpc8272ads.dts
index 7285ca1325f..46e2da30c3d 100644
--- a/arch/powerpc/boot/dts/mpc8272ads.dts
+++ b/arch/powerpc/boot/dts/mpc8272ads.dts
@@ -1,7 +1,7 @@
/*
* MPC8272 ADS Device Tree Source
*
- * Copyright 2005 Freescale Semiconductor Inc.
+ * Copyright 2005,2008 Freescale Semiconductor Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -9,6 +9,8 @@
* option) any later version.
*/
+/dts-v1/;
+
/ {
model = "MPC8272ADS";
compatible = "fsl,mpc8272ads";
@@ -21,11 +23,11 @@
PowerPC,8272@0 {
device_type = "cpu";
- reg = <0>;
- d-cache-line-size = <d#32>;
- i-cache-line-size = <d#32>;
- d-cache-size = <d#16384>;
- i-cache-size = <d#16384>;
+ reg = <0x0>;
+ d-cache-line-size = <32>;
+ i-cache-line-size = <32>;
+ d-cache-size = <16384>;
+ i-cache-size = <16384>;
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
@@ -34,7 +36,7 @@
memory {
device_type = "memory";
- reg = <0 0>;
+ reg = <0x0 0x0>;
};
localbus@f0010100 {
@@ -42,21 +44,21 @@
"fsl,pq2-localbus";
#address-cells = <2>;
#size-cells = <1>;
- reg = <f0010100 40>;
+ reg = <0xf0010100 0x40>;
- ranges = <0 0 fe000000 02000000
- 1 0 f4500000 00008000
- 3 0 f8200000 00008000>;
+ ranges = <0x0 0x0 0xfe000000 0x2000000
+ 0x1 0x0 0xf4500000 0x8000
+ 0x3 0x0 0xf8200000 0x8000>;
flash@0,0 {
compatible = "jedec-flash";
- reg = <0 0 2000000>;
+ reg = <0x0 0x0 0x2000000>;
bank-width = <4>;
device-width = <1>;
};
board-control@1,0 {
- reg = <1 0 20>;
+ reg = <0x1 0x0 0x20>;
compatible = "fsl,mpc8272ads-bcsr";
};
@@ -65,46 +67,46 @@
"fsl,pq2ads-pci-pic";
#interrupt-cells = <1>;
interrupt-controller;
- reg = <3 0 8>;
+ reg = <0x3 0x0 0x8>;
interrupt-parent = <&PIC>;
- interrupts = <14 8>;
+ interrupts = <20 8>;
};
};
pci@f0010800 {
device_type = "pci";
- reg = <f0010800 10c f00101ac 8 f00101c4 8>;
+ reg = <0xf0010800 0x10c 0xf00101ac 0x8 0xf00101c4 0x8>;
compatible = "fsl,mpc8272-pci", "fsl,pq2-pci";
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
- clock-frequency = <d#66666666>;
- interrupt-map-mask = <f800 0 0 7>;
+ clock-frequency = <66666666>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x16 */
- b000 0 0 1 &PCI_PIC 0
- b000 0 0 2 &PCI_PIC 1
- b000 0 0 3 &PCI_PIC 2
- b000 0 0 4 &PCI_PIC 3
+ 0xb000 0x0 0x0 0x1 &PCI_PIC 0
+ 0xb000 0x0 0x0 0x2 &PCI_PIC 1
+ 0xb000 0x0 0x0 0x3 &PCI_PIC 2
+ 0xb000 0x0 0x0 0x4 &PCI_PIC 3
/* IDSEL 0x17 */
- b800 0 0 1 &PCI_PIC 4
- b800 0 0 2 &PCI_PIC 5
- b800 0 0 3 &PCI_PIC 6
- b800 0 0 4 &PCI_PIC 7
+ 0xb800 0x0 0x0 0x1 &PCI_PIC 4
+ 0xb800 0x0 0x0 0x2 &PCI_PIC 5
+ 0xb800 0x0 0x0 0x3 &PCI_PIC 6
+ 0xb800 0x0 0x0 0x4 &PCI_PIC 7
/* IDSEL 0x18 */
- c000 0 0 1 &PCI_PIC 8
- c000 0 0 2 &PCI_PIC 9
- c000 0 0 3 &PCI_PIC a
- c000 0 0 4 &PCI_PIC b>;
+ 0xc000 0x0 0x0 0x1 &PCI_PIC 8
+ 0xc000 0x0 0x0 0x2 &PCI_PIC 9
+ 0xc000 0x0 0x0 0x3 &PCI_PIC 10
+ 0xc000 0x0 0x0 0x4 &PCI_PIC 11>;
interrupt-parent = <&PIC>;
- interrupts = <12 8>;
- ranges = <42000000 0 80000000 80000000 0 20000000
- 02000000 0 a0000000 a0000000 0 20000000
- 01000000 0 00000000 f6000000 0 02000000>;
+ interrupts = <18 8>;
+ ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x20000000
+ 0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
+ 0x1000000 0x0 0x0 0xf6000000 0x0 0x2000000>;
};
soc@f0000000 {
@@ -112,26 +114,26 @@
#size-cells = <1>;
device_type = "soc";
compatible = "fsl,mpc8272", "fsl,pq2-soc";
- ranges = <00000000 f0000000 00053000>;
+ ranges = <0x0 0xf0000000 0x53000>;
// Temporary -- will go away once kernel uses ranges for get_immrbase().
- reg = <f0000000 00053000>;
+ reg = <0xf0000000 0x53000>;
cpm@119c0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,mpc8272-cpm", "fsl,cpm2";
- reg = <119c0 30>;
+ reg = <0x119c0 0x30>;
ranges;
muram@0 {
#address-cells = <1>;
#size-cells = <1>;
- ranges = <0 0 10000>;
+ ranges = <0x0 0x0 0x10000>;
data@0 {
compatible = "fsl,cpm-muram-data";
- reg = <0 2000 9800 800>;
+ reg = <0x0 0x2000 0x9800 0x800>;
};
};
@@ -139,29 +141,29 @@
compatible = "fsl,mpc8272-brg",
"fsl,cpm2-brg",
"fsl,cpm-brg";
- reg = <119f0 10 115f0 10>;
+ reg = <0x119f0 0x10 0x115f0 0x10>;
};
serial@11a00 {
device_type = "serial";
compatible = "fsl,mpc8272-scc-uart",
"fsl,cpm2-scc-uart";
- reg = <11a00 20 8000 100>;
- interrupts = <28 8>;
+ reg = <0x11a00 0x20 0x8000 0x100>;
+ interrupts = <40 8>;
interrupt-parent = <&PIC>;
fsl,cpm-brg = <1>;
- fsl,cpm-command = <00800000>;
+ fsl,cpm-command = <0x800000>;
};
serial@11a60 {
device_type = "serial";
compatible = "fsl,mpc8272-scc-uart",
"fsl,cpm2-scc-uart";
- reg = <11a60 20 8300 100>;
- interrupts = <2b 8>;
+ reg = <0x11a60 0x20 0x8300 0x100>;
+ interrupts = <43 8>;
interrupt-parent = <&PIC>;
fsl,cpm-brg = <4>;
- fsl,cpm-command = <0ce00000>;
+ fsl,cpm-command = <0xce00000>;
};
mdio@10d40 {
@@ -169,23 +171,23 @@
compatible = "fsl,mpc8272ads-mdio-bitbang",
"fsl,mpc8272-mdio-bitbang",
"fsl,cpm2-mdio-bitbang";
- reg = <10d40 14>;
+ reg = <0x10d40 0x14>;
#address-cells = <1>;
#size-cells = <0>;
- fsl,mdio-pin = <12>;
- fsl,mdc-pin = <13>;
+ fsl,mdio-pin = <18>;
+ fsl,mdc-pin = <19>;
PHY0: ethernet-phy@0 {
interrupt-parent = <&PIC>;
- interrupts = <17 8>;
- reg = <0>;
+ interrupts = <23 8>;
+ reg = <0x0>;
device_type = "ethernet-phy";
};
PHY1: ethernet-phy@1 {
interrupt-parent = <&PIC>;
- interrupts = <17 8>;
- reg = <3>;
+ interrupts = <23 8>;
+ reg = <0x3>;
device_type = "ethernet-phy";
};
};
@@ -194,33 +196,33 @@
device_type = "network";
compatible = "fsl,mpc8272-fcc-enet",
"fsl,cpm2-fcc-enet";
- reg = <11300 20 8400 100 11390 1>;
+ reg = <0x11300 0x20 0x8400 0x100 0x11390 0x1>;
local-mac-address = [ 00 00 00 00 00 00 ];
- interrupts = <20 8>;
+ interrupts = <32 8>;
interrupt-parent = <&PIC>;
phy-handle = <&PHY0>;
linux,network-index = <0>;
- fsl,cpm-command = <12000300>;
+ fsl,cpm-command = <0x12000300>;
};
ethernet@11320 {
device_type = "network";
compatible = "fsl,mpc8272-fcc-enet",
"fsl,cpm2-fcc-enet";
- reg = <11320 20 8500 100 113b0 1>;
+ reg = <0x11320 0x20 0x8500 0x100 0x113b0 0x1>;
local-mac-address = [ 00 00 00 00 00 00 ];
- interrupts = <21 8>;
+ interrupts = <33 8>;
interrupt-parent = <&PIC>;
phy-handle = <&PHY1>;
linux,network-index = <1>;
- fsl,cpm-command = <16200300>;
+ fsl,cpm-command = <0x16200300>;
};
};
PIC: interrupt-controller@10c00 {
#interrupt-cells = <2>;
interrupt-controller;
- reg = <10c00 80>;
+ reg = <0x10c00 0x80>;
compatible = "fsl,mpc8272-pic", "fsl,cpm2-pic";
};
@@ -232,14 +234,14 @@
"fsl,talitos-sec2",
"fsl,talitos",
"talitos";
- reg = <30000 10000>;
- interrupts = <b 8>;
+ reg = <0x30000 0x10000>;
+ interrupts = <11 8>;
interrupt-parent = <&PIC>;
num-channels = <4>;
- channel-fifo-len = <18>;
- exec-units-mask = <0000007e>;
+ channel-fifo-len = <24>;
+ exec-units-mask = <0x7e>;
/* desc mask is for rev1.x, we need runtime fixup for >=2.x */
- descriptor-types-mask = <01010ebf>;
+ descriptor-types-mask = <0x1010ebf>;
};
};