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authorLinus Torvalds <torvalds@linux-foundation.org>2008-10-20 09:13:34 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2008-10-20 09:13:34 -0700
commited402af3c23a4804b3f8899263e8d0f97c62ab49 (patch)
tree3aa971aea57f900a3060cc0545b199ef611f4dcf /arch/sh/include/asm/cmpxchg-llsc.h
parent096e6f673dc02a6394dc9a7d8f8735c6978f5b91 (diff)
parent40e24c403f325715f9c43b9fed2068641201ee0b (diff)
Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (112 commits) sh: Move SH-4 CPU headers down one more level. sh: Only build in gpio.o when CONFIG_GENERIC_GPIO is selected. sh: Migrate common board headers to mach-common/. sh: Move the CPU definition headers from asm/ to cpu/. serial: sh-sci: Add support SCIF of SH7723 video: add sh_mobile_lcdc platform flags video: remove unused sh_mobile_lcdc platform data sh: remove consistent alloc cruft sh: add dynamic crash base address support sh: reduce Migo-R smc91x overruns sh: Fix up some merge damage. Fix debugfs_create_file's error checking method for arch/sh/mm/ Fix debugfs_create_dir's error checking method for arch/sh/kernel/ sh: ap325rxa: Add support RTC RX-8564LC in AP325RXA board sh: Use sh7720 GPIO on magicpanelr2 board sh: Add sh7720 pinmux code sh: Use sh7203 GPIO on rsk7203 board sh: Add sh7203 pinmux code sh: Use sh7723 GPIO on AP325RXA board sh: Add sh7723 pinmux code ...
Diffstat (limited to 'arch/sh/include/asm/cmpxchg-llsc.h')
-rw-r--r--arch/sh/include/asm/cmpxchg-llsc.h71
1 files changed, 71 insertions, 0 deletions
diff --git a/arch/sh/include/asm/cmpxchg-llsc.h b/arch/sh/include/asm/cmpxchg-llsc.h
new file mode 100644
index 00000000000..aee3bf28658
--- /dev/null
+++ b/arch/sh/include/asm/cmpxchg-llsc.h
@@ -0,0 +1,71 @@
+#ifndef __ASM_SH_CMPXCHG_LLSC_H
+#define __ASM_SH_CMPXCHG_LLSC_H
+
+static inline unsigned long xchg_u32(volatile u32 *m, unsigned long val)
+{
+ unsigned long retval;
+ unsigned long tmp;
+
+ __asm__ __volatile__ (
+ "1: \n\t"
+ "movli.l @%1, %0 ! xchg_u32 \n\t"
+ "mov %0, %2 \n\t"
+ "mov %4, %0 \n\t"
+ "movco.l %0, @%1 \n\t"
+ "bf 1b \n\t"
+ "synco \n\t"
+ : "=&z"(tmp), "=r" (m), "=&r" (retval)
+ : "1" (m), "r" (val)
+ : "t", "memory"
+ );
+
+ return retval;
+}
+
+static inline unsigned long xchg_u8(volatile u8 *m, unsigned long val)
+{
+ unsigned long retval;
+ unsigned long tmp;
+
+ __asm__ __volatile__ (
+ "1: \n\t"
+ "movli.l @%1, %0 ! xchg_u8 \n\t"
+ "mov %0, %2 \n\t"
+ "mov %4, %0 \n\t"
+ "movco.l %0, @%1 \n\t"
+ "bf 1b \n\t"
+ "synco \n\t"
+ : "=&z"(tmp), "=r" (m), "=&r" (retval)
+ : "1" (m), "r" (val & 0xff)
+ : "t", "memory"
+ );
+
+ return retval;
+}
+
+static inline unsigned long
+__cmpxchg_u32(volatile int *m, unsigned long old, unsigned long new)
+{
+ unsigned long retval;
+ unsigned long tmp;
+
+ __asm__ __volatile__ (
+ "1: \n\t"
+ "movli.l @%1, %0 ! __cmpxchg_u32 \n\t"
+ "mov %0, %2 \n\t"
+ "cmp/eq %2, %4 \n\t"
+ "bf 2f \n\t"
+ "mov %5, %0 \n\t"
+ "2: \n\t"
+ "movco.l %0, @%1 \n\t"
+ "bf 1b \n\t"
+ "synco \n\t"
+ : "=&z" (tmp), "=r" (m), "=&r" (retval)
+ : "1" (m), "r" (old), "r" (new)
+ : "t", "memory"
+ );
+
+ return retval;
+}
+
+#endif /* __ASM_SH_CMPXCHG_LLSC_H */