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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2008-04-19 17:17:29 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-04-19 17:17:29 +0100
commitadf6d34e460387ee3e8f1e1875d52bff51212c7d (patch)
tree88ef100143e6184103a608f82dfd232bf6376eaf /arch/sh/kernel/cpu
parentd1964dab60ce7c104dd21590e987a8787db18051 (diff)
parent3760d31f11bfbd0ead9eaeb8573e0602437a9d7c (diff)
Merge branch 'omap2-upstream' into devel
Diffstat (limited to 'arch/sh/kernel/cpu')
-rw-r--r--arch/sh/kernel/cpu/sh2a/fpu.c1
-rw-r--r--arch/sh/kernel/cpu/sh4/fpu.c1
-rw-r--r--arch/sh/kernel/cpu/sh5/fpu.c1
3 files changed, 3 insertions, 0 deletions
diff --git a/arch/sh/kernel/cpu/sh2a/fpu.c b/arch/sh/kernel/cpu/sh2a/fpu.c
index ff99562456f..5627c0b3ffa 100644
--- a/arch/sh/kernel/cpu/sh2a/fpu.c
+++ b/arch/sh/kernel/cpu/sh2a/fpu.c
@@ -13,6 +13,7 @@
#include <linux/signal.h>
#include <asm/processor.h>
#include <asm/io.h>
+#include <asm/fpu.h>
/* The PR (precision) bit in the FP Status Register must be clear when
* an frchg instruction is executed, otherwise the instruction is undefined.
diff --git a/arch/sh/kernel/cpu/sh4/fpu.c b/arch/sh/kernel/cpu/sh4/fpu.c
index 817f9939cda..8020796139f 100644
--- a/arch/sh/kernel/cpu/sh4/fpu.c
+++ b/arch/sh/kernel/cpu/sh4/fpu.c
@@ -16,6 +16,7 @@
#include <asm/cpu/fpu.h>
#include <asm/processor.h>
#include <asm/system.h>
+#include <asm/fpu.h>
/* The PR (precision) bit in the FP Status Register must be clear when
* an frchg instruction is executed, otherwise the instruction is undefined.
diff --git a/arch/sh/kernel/cpu/sh5/fpu.c b/arch/sh/kernel/cpu/sh5/fpu.c
index 30b76a94abf..dd4f51ffb50 100644
--- a/arch/sh/kernel/cpu/sh5/fpu.c
+++ b/arch/sh/kernel/cpu/sh5/fpu.c
@@ -17,6 +17,7 @@
#include <asm/processor.h>
#include <asm/user.h>
#include <asm/io.h>
+#include <asm/fpu.h>
/*
* Initially load the FPU with signalling NANS. This bit pattern