diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2008-07-28 08:33:25 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-07-28 08:33:25 -0700 |
| commit | c32f1a34ff1097110469a240ea4539dc9c101e96 (patch) | |
| tree | eda863205e83afe54cbedcf15cdac416cdec2cf5 /arch/sparc/include/asm/dcu.h | |
| parent | 4f31f3080943c7e3541f07df326f06d598a067d0 (diff) | |
| parent | 04d91cb8163f7f946e348b2362a6e5dfa5f06b13 (diff) | |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6:
sparc: Set CONFIG_HAVE_ARCH_TRACEHOOK
sparc: Add task_pt_regs().
sparc: Add call to tracehook_signal_handler().
sparc: Create and use TIF_NOTIFY_RESUME.
sparc: Use tracehook routines in syscall_trace().
sparc64: tracehook: CONFIG_HAVE_ARCH_TRACEHOOK
sparc: Add user_stack_pointer().
sparc64: tracehook_signal_handler
sparc64: tracehook: TIF_NOTIFY_RESUME
sparc: Add asm/syscall.h
sparc64: tracehook syscall
sparc: enable headers_export again
sparc, sparc64: use arch/sparc/include
Diffstat (limited to 'arch/sparc/include/asm/dcu.h')
| -rw-r--r-- | arch/sparc/include/asm/dcu.h | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/arch/sparc/include/asm/dcu.h b/arch/sparc/include/asm/dcu.h new file mode 100644 index 00000000000..0f704e106a1 --- /dev/null +++ b/arch/sparc/include/asm/dcu.h @@ -0,0 +1,27 @@ +#ifndef _SPARC64_DCU_H +#define _SPARC64_DCU_H + +#include <linux/const.h> + +/* UltraSparc-III Data Cache Unit Control Register */ +#define DCU_CP _AC(0x0002000000000000,UL) /* Phys Cache Enable w/o mmu */ +#define DCU_CV _AC(0x0001000000000000,UL) /* Virt Cache Enable w/o mmu */ +#define DCU_ME _AC(0x0000800000000000,UL) /* NC-store Merging Enable */ +#define DCU_RE _AC(0x0000400000000000,UL) /* RAW bypass Enable */ +#define DCU_PE _AC(0x0000200000000000,UL) /* PCache Enable */ +#define DCU_HPE _AC(0x0000100000000000,UL) /* HW prefetch Enable */ +#define DCU_SPE _AC(0x0000080000000000,UL) /* SW prefetch Enable */ +#define DCU_SL _AC(0x0000040000000000,UL) /* Secondary ld-steering Enab*/ +#define DCU_WE _AC(0x0000020000000000,UL) /* WCache enable */ +#define DCU_PM _AC(0x000001fe00000000,UL) /* PA Watchpoint Byte Mask */ +#define DCU_VM _AC(0x00000001fe000000,UL) /* VA Watchpoint Byte Mask */ +#define DCU_PR _AC(0x0000000001000000,UL) /* PA Watchpoint Read Enable */ +#define DCU_PW _AC(0x0000000000800000,UL) /* PA Watchpoint Write Enable*/ +#define DCU_VR _AC(0x0000000000400000,UL) /* VA Watchpoint Read Enable */ +#define DCU_VW _AC(0x0000000000200000,UL) /* VA Watchpoint Write Enable*/ +#define DCU_DM _AC(0x0000000000000008,UL) /* DMMU Enable */ +#define DCU_IM _AC(0x0000000000000004,UL) /* IMMU Enable */ +#define DCU_DC _AC(0x0000000000000002,UL) /* Data Cache Enable */ +#define DCU_IC _AC(0x0000000000000001,UL) /* Instruction Cache Enable */ + +#endif /* _SPARC64_DCU_H */ |