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authorSteven Whitehouse <swhiteho@redhat.com>2006-07-17 09:25:26 -0400
committerSteven Whitehouse <swhiteho@redhat.com>2006-07-17 09:25:26 -0400
commit4bf311ddfbffe12d41ad1a3c311ab727db6f72cb (patch)
tree9d19a2774e83637d86dc876f3af22af1dacf0bec /arch/sparc64/kernel/prom.c
parent597d0cae0f99f62501e229bed50e8149604015bb (diff)
parent82d6897fefca6206bca7153805b4c5359ce97fc4 (diff)
Merge branch 'master'
Diffstat (limited to 'arch/sparc64/kernel/prom.c')
-rw-r--r--arch/sparc64/kernel/prom.c51
1 files changed, 46 insertions, 5 deletions
diff --git a/arch/sparc64/kernel/prom.c b/arch/sparc64/kernel/prom.c
index 99daeee4209..c86007a2aa3 100644
--- a/arch/sparc64/kernel/prom.c
+++ b/arch/sparc64/kernel/prom.c
@@ -539,6 +539,45 @@ static unsigned long __sabre_onboard_imap_off[] = {
((ino & 0x20) ? (SABRE_ICLR_SCSI + (((ino) & 0x1f) << 3)) : \
(SABRE_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
+static int sabre_device_needs_wsync(struct device_node *dp)
+{
+ struct device_node *parent = dp->parent;
+ char *parent_model, *parent_compat;
+
+ /* This traversal up towards the root is meant to
+ * handle two cases:
+ *
+ * 1) non-PCI bus sitting under PCI, such as 'ebus'
+ * 2) the PCI controller interrupts themselves, which
+ * will use the sabre_irq_build but do not need
+ * the DMA synchronization handling
+ */
+ while (parent) {
+ if (!strcmp(parent->type, "pci"))
+ break;
+ parent = parent->parent;
+ }
+
+ if (!parent)
+ return 0;
+
+ parent_model = of_get_property(parent,
+ "model", NULL);
+ if (parent_model &&
+ (!strcmp(parent_model, "SUNW,sabre") ||
+ !strcmp(parent_model, "SUNW,simba")))
+ return 0;
+
+ parent_compat = of_get_property(parent,
+ "compatible", NULL);
+ if (parent_compat &&
+ (!strcmp(parent_compat, "pci108e,a000") ||
+ !strcmp(parent_compat, "pci108e,a001")))
+ return 0;
+
+ return 1;
+}
+
static unsigned int sabre_irq_build(struct device_node *dp,
unsigned int ino,
void *_data)
@@ -577,15 +616,17 @@ static unsigned int sabre_irq_build(struct device_node *dp,
virt_irq = build_irq(inofixup, iclr, imap);
+ /* If the parent device is a PCI<->PCI bridge other than
+ * APB, we have to install a pre-handler to ensure that
+ * all pending DMA is drained before the interrupt handler
+ * is run.
+ */
regs = of_get_property(dp, "reg", NULL);
- if (regs &&
- ((regs->phys_hi >> 16) & 0xff) != irq_data->pci_first_busno) {
+ if (regs && sabre_device_needs_wsync(dp)) {
irq_install_pre_handler(virt_irq,
sabre_wsync_handler,
(void *) (long) regs->phys_hi,
- (void *)
- controller_regs +
- SABRE_WRSYNC);
+ (void *) irq_data);
}
return virt_irq;