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authorDavid S. Miller <davem@sunset.davemloft.net>2007-03-15 17:51:26 -0700
committerDavid S. Miller <davem@sunset.davemloft.net>2007-04-26 01:55:31 -0700
commit85f1e1f66011e67e68065f2db4cde499decb9c84 (patch)
tree0293a92b819df2e5c14e94c67e1d92251572ab97 /arch/sparc64
parent5be4a963675d3270fab7f55e8c4a2e56afd408f6 (diff)
[SPARC64]: Use DECLARE_BITMAP and BITS_TO_LONGS in mm/init.c
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc64')
-rw-r--r--arch/sparc64/mm/init.c13
1 files changed, 7 insertions, 6 deletions
diff --git a/arch/sparc64/mm/init.c b/arch/sparc64/mm/init.c
index 97b5ebc9116..83a76a2eb71 100644
--- a/arch/sparc64/mm/init.c
+++ b/arch/sparc64/mm/init.c
@@ -149,12 +149,6 @@ unsigned long *sparc64_valid_addr_bitmap __read_mostly;
unsigned long kern_base __read_mostly;
unsigned long kern_size __read_mostly;
-/* get_new_mmu_context() uses "cache + 1". */
-DEFINE_SPINLOCK(ctx_alloc_lock);
-unsigned long tlb_context_cache = CTX_FIRST_VERSION - 1;
-#define CTX_BMAP_SLOTS (1UL << (CTX_NR_BITS - 6))
-unsigned long mmu_context_bmap[CTX_BMAP_SLOTS];
-
/* Initial ramdisk setup */
extern unsigned long sparc_ramdisk_image64;
extern unsigned int sparc_ramdisk_image;
@@ -701,6 +695,13 @@ void __flush_dcache_range(unsigned long start, unsigned long end)
}
#endif /* DCACHE_ALIASING_POSSIBLE */
+/* get_new_mmu_context() uses "cache + 1". */
+DEFINE_SPINLOCK(ctx_alloc_lock);
+unsigned long tlb_context_cache = CTX_FIRST_VERSION - 1;
+#define MAX_CTX_NR (1UL << CTX_NR_BITS)
+#define CTX_BMAP_SLOTS BITS_TO_LONGS(MAX_CTX_NR)
+DECLARE_BITMAP(mmu_context_bmap, MAX_CTX_NR);
+
/* Caller does TLB context flushing on local CPU if necessary.
* The caller also ensures that CTX_VALID(mm->context) is false.
*