diff options
author | Adrian Bunk <bunk@kernel.org> | 2008-07-23 21:28:50 -0700 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-07-24 10:47:24 -0700 |
commit | f606ddf42fd4edc558eeb48bfee66d2c591571d2 (patch) | |
tree | 193f00db121201255b2629fce43b99a53c4ec735 /arch/v850/kernel/rte_nb85e_cb.c | |
parent | 99764fa4ceeecba8b9e0a8a5565b418a2e94f83b (diff) |
remove the v850 port
Trying to compile the v850 port brings many compile errors, one of them exists
since at least kernel 2.6.19.
There also seems to be noone willing to bring this port back into a usable
state.
This patch therefore removes the v850 port.
If anyone ever decides to revive the v850 port the code will still be
available from older kernels, and it wouldn't be impossible for the port to
reenter the kernel if it would become actively maintained again.
Signed-off-by: Adrian Bunk <bunk@kernel.org>
Acked-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'arch/v850/kernel/rte_nb85e_cb.c')
-rw-r--r-- | arch/v850/kernel/rte_nb85e_cb.c | 81 |
1 files changed, 0 insertions, 81 deletions
diff --git a/arch/v850/kernel/rte_nb85e_cb.c b/arch/v850/kernel/rte_nb85e_cb.c deleted file mode 100644 index b4a045da5d7..00000000000 --- a/arch/v850/kernel/rte_nb85e_cb.c +++ /dev/null @@ -1,81 +0,0 @@ -/* - * arch/v850/kernel/rte_nb85e_cb.c -- Midas labs RTE-V850E/NB85E-CB board - * - * Copyright (C) 2001,02,03 NEC Electronics Corporation - * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file COPYING in the main directory of this - * archive for more details. - * - * Written by Miles Bader <miles@gnu.org> - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/mm.h> -#include <linux/swap.h> -#include <linux/bootmem.h> -#include <linux/irq.h> - -#include <asm/atomic.h> -#include <asm/page.h> -#include <asm/v850e.h> -#include <asm/rte_nb85e_cb.h> - -#include "mach.h" - -void __init mach_early_init (void) -{ - /* Configure caching; some possible settings: - - BHC = 0x0000, DCC = 0x0000 -- all caching disabled - BHC = 0x0040, DCC = 0x0000 -- SDRAM: icache only - BHC = 0x0080, DCC = 0x0C00 -- SDRAM: write-back dcache only - BHC = 0x00C0, DCC = 0x0C00 -- SDRAM: icache + write-back dcache - BHC = 0x00C0, DCC = 0x0800 -- SDRAM: icache + write-thru dcache - - We can only cache SDRAM (we can't use cache SRAM because it's in - the same memory region as the on-chip RAM and I/O space). - - Unfortunately, the dcache seems to be buggy, so we only use the - icache for now. */ - v850e_cache_enable (0x0040 /*BHC*/, 0x0003 /*ICC*/, 0x0000 /*DCC*/); - - rte_cb_early_init (); -} - -void __init mach_get_physical_ram (unsigned long *ram_start, - unsigned long *ram_len) -{ - /* We just use SDRAM here. */ - *ram_start = SDRAM_ADDR; - *ram_len = SDRAM_SIZE; -} - -void mach_gettimeofday (struct timespec *tv) -{ - tv->tv_sec = 0; - tv->tv_nsec = 0; -} - -/* Called before configuring an on-chip UART. */ -void rte_nb85e_cb_uart_pre_configure (unsigned chan, - unsigned cflags, unsigned baud) -{ - /* The RTE-NB85E-CB connects some general-purpose I/O pins on the - CPU to the RTS/CTS lines the UART's serial connection, as follows: - P00 = CTS (in), P01 = DSR (in), P02 = RTS (out), P03 = DTR (out). */ - - TEG_PORT0_PM = 0x03; /* P00 and P01 inputs, P02 and P03 outputs */ - TEG_PORT0_IO = 0x03; /* Accept input */ - - /* Do pre-configuration for the actual UART. */ - teg_uart_pre_configure (chan, cflags, baud); -} - -void __init mach_init_irqs (void) -{ - teg_init_irqs (); - rte_cb_init_irqs (); -} |