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authorLinus Torvalds <torvalds@linux-foundation.org>2010-01-12 16:21:09 -0800
committerH. Peter Anvin <hpa@zytor.com>2010-01-12 20:43:04 -0800
commit59c33fa7791e9948ba467c2b83e307a0d087ab49 (patch)
tree601515d6f8d690672c4eef5e0109b927c1d04bf8 /arch/x86/include/asm/suspend_64.h
parent5abbbbf0b0cd4abf5898136d0c345dc99b859c8c (diff)
x86-32: clean up rwsem inline asm statements
This makes gcc use the right register names and instruction operand sizes automatically for the rwsem inline asm statements. So instead of using "(%%eax)" to specify the memory address that is the semaphore, we use "(%1)" or similar. And instead of forcing the operation to always be 32-bit, we use "%z0", taking the size from the actual semaphore data structure itself. This doesn't actually matter on x86-32, but if we want to use the same inline asm for x86-64, we'll need to have the compiler generate the proper 64-bit names for the registers (%rax instead of %eax), and if we want to use a 64-bit counter too (in order to avoid the 15-bit limit on the write counter that limits concurrent users to 32767 threads), we'll need to be able to generate instructions with "q" accesses rather than "l". Since this header currently isn't enabled on x86-64, none of that matters, but we do want to use the xadd version of the semaphores rather than have to take spinlocks to do a rwsem. The mm->mmap_sem can be heavily contended when you have lots of threads all taking page faults, and the fallback rwsem code that uses a spinlock performs abysmally badly in that case. [ hpa: modified the patch to skip size suffixes entirely when they are redundant due to register operands. ] Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org> LKML-Reference: <alpine.LFD.2.00.1001121613560.17145@localhost.localdomain> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Diffstat (limited to 'arch/x86/include/asm/suspend_64.h')
0 files changed, 0 insertions, 0 deletions