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authorIngo Molnar <mingo@elte.hu>2009-01-31 03:57:12 +0100
committerIngo Molnar <mingo@elte.hu>2009-02-05 22:27:55 +0100
commitfdbecd9fd14198853bec4cbae8bc7af93f2e3de3 (patch)
tree7b697ba90a48fa94529e03ec7e1109864f031cf2 /arch/x86
parent65a4e574d2382d83f71b30ea92f86d2e40a6ef8d (diff)
x86, apic: explain the purpose of max_physical_apicid
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86')
-rw-r--r--arch/x86/kernel/apic.c17
1 files changed, 15 insertions, 2 deletions
diff --git a/arch/x86/kernel/apic.c b/arch/x86/kernel/apic.c
index a04a73a51d2..5475e1c3180 100644
--- a/arch/x86/kernel/apic.c
+++ b/arch/x86/kernel/apic.c
@@ -50,13 +50,26 @@
#include <asm/smp.h>
unsigned int num_processors;
+
unsigned disabled_cpus __cpuinitdata;
+
/* Processor that is doing the boot up */
unsigned int boot_cpu_physical_apicid = -1U;
-EXPORT_SYMBOL(boot_cpu_physical_apicid);
+
+/*
+ * The highest APIC ID seen during enumeration.
+ *
+ * This determines the messaging protocol we can use: if all APIC IDs
+ * are in the 0 ... 7 range, then we can use logical addressing which
+ * has some performance advantages (better broadcasting).
+ *
+ * If there's an APIC ID above 8, we use physical addressing.
+ */
unsigned int max_physical_apicid;
-/* Bitmask of physically existing CPUs */
+/*
+ * Bitmask of physically existing CPUs:
+ */
physid_mask_t phys_cpu_present_map;
/*