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authorNicolas Pitre <nico@cam.org>2008-06-03 23:06:21 +0200
committerLennert Buytenhek <buytenh@marvell.com>2008-06-22 22:44:59 +0200
commit2e2023fe02c3530db3a0d6a26a2e90396a428796 (patch)
treea6a656f981f230666b821cb7bfc1601a2c6069fb /arch
parent6c386e58aadb90fb5d8b5be979e02d74f8be52fe (diff)
[ARM] Feroceon: catch other Feroceon CPU IDs in head.S
Tweak the Feroceon match/mask in arch/arm/boot/compressed/head.S to match a couple of newer Feroceon cores (such as the 88fr571vd with CPU ID 0x56155710, and the 88fr131 with CPU ID 0x56251310) as well. Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/compressed/head.S4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index 3c2c8f2a1dc..de41daeab5e 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -623,8 +623,8 @@ proc_types:
b __armv4_mmu_cache_off
b __armv4_mmu_cache_flush
- .word 0x56055310 @ Feroceon
- .word 0xfffffff0
+ .word 0x56050000 @ Feroceon
+ .word 0xff0f0000
b __armv4_mmu_cache_on
b __armv4_mmu_cache_off
b __armv5tej_mmu_cache_flush