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authorEric Miao <eric.y.miao@gmail.com>2007-06-06 06:36:04 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-07-12 14:28:11 +0100
commit53665a50fdac6fe11e0dde4e2b95700ed5184dc4 (patch)
tree4eac4540a1f404f38fa6f1f83874ac8c2e77d7e5 /arch
parentc08b7b3ef6bf489ddabadc03e050f3db2ea44b5d (diff)
[ARM] 4436/1: PXA: move low IRQ initialization code to pxa_init_irq_low()
1. move low IRQ initialization code to pxa_init_irq_low() Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-pxa/irq.c36
1 files changed, 21 insertions, 15 deletions
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c
index 844d3de3ef4..42b2da2f213 100644
--- a/arch/arm/mach-pxa/irq.c
+++ b/arch/arm/mach-pxa/irq.c
@@ -67,6 +67,26 @@ static struct irq_chip pxa_internal_chip_low = {
.set_wake = pxa_set_wake,
};
+void __init pxa_init_irq_low(void)
+{
+ int irq;
+
+ /* disable all IRQs */
+ ICMR = 0;
+
+ /* all IRQs are IRQ, not FIQ */
+ ICLR = 0;
+
+ /* only unmasked interrupts kick us out of idle */
+ ICCR = 1;
+
+ for (irq = PXA_IRQ(0); irq <= PXA_IRQ(31); irq++) {
+ set_irq_chip(irq, &pxa_internal_chip_low);
+ set_irq_handler(irq, handle_level_irq);
+ set_irq_flags(irq, IRQF_VALID);
+ }
+}
+
#ifdef CONFIG_PXA27x
/*
@@ -331,12 +351,6 @@ void __init pxa_init_irq(void)
{
int irq;
- /* disable all IRQs */
- ICMR = 0;
-
- /* all IRQs are IRQ, not FIQ */
- ICLR = 0;
-
/* clear all GPIO edge detects */
GFER0 = 0;
GFER1 = 0;
@@ -355,18 +369,10 @@ void __init pxa_init_irq(void)
GEDR3 = GEDR3;
#endif
- /* only unmasked interrupts kick us out of idle */
- ICCR = 1;
-
/* GPIO 0 and 1 must have their mask bit always set */
GPIO_IRQ_mask[0] = 3;
- for (irq = PXA_IRQ(0); irq <= PXA_IRQ(31); irq++) {
- set_irq_chip(irq, &pxa_internal_chip_low);
- set_irq_handler(irq, handle_level_irq);
- set_irq_flags(irq, IRQF_VALID);
- }
-
+ pxa_init_irq_low();
#ifdef CONFIG_PXA27x
pxa_init_irq_high();
#endif