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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-18 16:25:10 -0700
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-18 16:25:10 -0700
commit7f907d7486f2519c2ff1493bfbcdc36dcacd85b7 (patch)
tree955d5452f1b54b4496fefbf095548c0e2994410e /arch
parent0ba4da03cc84f54b2574e1abcdaa18ef8456a9fb (diff)
parent7a55fd0bb31eb369149b89fdf9e0c7bc73486ee1 (diff)
Merge with master.kernel.org:/home/rmk/linux-2.6-rmk.git
This adds the missing arch/arm/lib/bitops.h file.
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/lib/bitops.h33
1 files changed, 33 insertions, 0 deletions
diff --git a/arch/arm/lib/bitops.h b/arch/arm/lib/bitops.h
new file mode 100644
index 00000000000..4a83ab6cd56
--- /dev/null
+++ b/arch/arm/lib/bitops.h
@@ -0,0 +1,33 @@
+ .macro bitop, instr
+ and r2, r0, #7
+ mov r3, #1
+ mov r3, r3, lsl r2
+ save_and_disable_irqs ip, r2
+ ldrb r2, [r1, r0, lsr #3]
+ \instr r2, r2, r3
+ strb r2, [r1, r0, lsr #3]
+ restore_irqs ip
+ mov pc, lr
+ .endm
+
+/**
+ * testop - implement a test_and_xxx_bit operation.
+ * @instr: operational instruction
+ * @store: store instruction
+ *
+ * Note: we can trivially conditionalise the store instruction
+ * to avoid dirting the data cache.
+ */
+ .macro testop, instr, store
+ add r1, r1, r0, lsr #3
+ and r3, r0, #7
+ mov r0, #1
+ save_and_disable_irqs ip, r2
+ ldrb r2, [r1]
+ tst r2, r0, lsl r3
+ \instr r2, r2, r0, lsl r3
+ \store r2, [r1]
+ restore_irqs ip
+ moveq r0, #0
+ mov pc, lr
+ .endm