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authorJan Beulich <jbeulich@novell.com>2006-03-25 16:29:19 +0100
committerLinus Torvalds <torvalds@g5.osdl.org>2006-03-25 09:10:52 -0800
commit893efca9279d7a78bae6532de0524e53370819d5 (patch)
tree5ae05a1b6a0aa34cab50c0826782c04e9cc338f9 /arch
parent3240114d23793384fa9c3c53f391f672d1c22d2e (diff)
[PATCH] x86_64: disallow multi-byte hardware execution breakpoints
While AMD formally permits multi-byte execution breakpoints, Intel disallows 8-byte as much as 2- or 4-byte ones. Signed-off-by: Jan Beulich <jbeulich@novell.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/x86_64/kernel/ptrace.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/x86_64/kernel/ptrace.c b/arch/x86_64/kernel/ptrace.c
index 53205622351..d44b2c1e63a 100644
--- a/arch/x86_64/kernel/ptrace.c
+++ b/arch/x86_64/kernel/ptrace.c
@@ -420,9 +420,9 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
case offsetof(struct user, u_debugreg[7]):
/* See arch/i386/kernel/ptrace.c for an explanation of
* this awkward check.*/
- data &= ~DR_CONTROL_RESERVED;
- for(i=0; i<4; i++)
- if ((0x5454 >> ((data >> (16 + 4*i)) & 0xf)) & 1)
+ data &= ~DR_CONTROL_RESERVED;
+ for(i=0; i<4; i++)
+ if ((0x5554 >> ((data >> (16 + 4*i)) & 0xf)) & 1)
break;
if (i == 4) {
child->thread.debugreg7 = data;