re-enable-fiq.patch

FIQ is back up again, changed the stack to point to the post FIQ-vector
area, remove various meddlings needed to try to fix it.

Signed-off-by: Andy Green <andy@openmoko.com>

3 files changed, 12 insertions, 11 deletions

diff --git a/arch/arm/mach-s3c2440/fiq_c_isr.c b/arch/arm/mach-s3c2440/fiq_c_isr.c
index d777e2682af..c2fafbde17c 100644
--- a/arch/arm/mach-s3c2440/fiq_c_isr.c
+++ b/arch/arm/mach-s3c2440/fiq_c_isr.c
@@ -60,11 +60,12 @@
  */
 
 /* more than enough to cover our jump instruction to the isr */
-#define SIZEOF_FIQ_JUMP 8
-/* more than enough to cover s3c2440_fiq_isr() in 4K blocks */
-#define SIZEOF_FIQ_ISR 0x2000
-/* increase the size of the stack that is active during FIQ as needed */
-static u8 u8aFiqStack[4096];
+#define SIZEOF_FIQ_JUMP 4
+
+#define FIQ_VECTOR 0xffff001c
+
+/* we put the stack at the area after the FIQ vector */
+#define FIQ_STACK_SIZE 256
 
 /* only one FIQ ISR possible, okay to do these here */
 u32 _fiq_ack_mask; /* used by isr exit define */
@@ -249,13 +250,14 @@ static void fiq_set_vector_and_regs(void)
 	/* prep the special FIQ mode regs */
 	memset(&regs, 0, sizeof(regs));
 	regs.ARM_r8 = (unsigned long)s3c2440_fiq_isr;
-	regs.ARM_sp = (unsigned long)u8aFiqStack + sizeof(u8aFiqStack) - 4;
-
-	/* set up the special FIQ-mode-only registers from our regs */
-	set_fiq_regs(&regs);
+	regs.ARM_r10 = FIQ_VECTOR + SIZEOF_FIQ_JUMP;
+	regs.ARM_sp = FIQ_VECTOR + SIZEOF_FIQ_JUMP + FIQ_STACK_SIZE - 4;
 	
 	/* copy our jump to the real ISR into the hard vector address */
 	set_fiq_handler(s3c2440_FIQ_Branch, SIZEOF_FIQ_JUMP);
+
+	/* set up the special FIQ-mode-only registers from our regs */
+	set_fiq_regs(&regs);
 }
 
 #ifdef CONFIG_PM
diff --git a/arch/arm/mach-s3c2440/fiq_c_isr.h b/arch/arm/mach-s3c2440/fiq_c_isr.h
index 3facf50ce2f..a3a2622b81d 100644
--- a/arch/arm/mach-s3c2440/fiq_c_isr.h
+++ b/arch/arm/mach-s3c2440/fiq_c_isr.h
@@ -29,7 +29,6 @@ void __attribute__ ((naked)) s3c2440_fiq_isr(void) \
 	const int _FIQ_FRAME_SIZE = FRAME; \
 	/* entry takes care to store registers we will be treading on here */\
 	asm __volatile__ (\
-		"mov     ip, sp ;"\
 		/* stash FIQ and r0-r8 normal regs */\
 		"stmdb	sp!, {r0-r12, lr};"\
 		/* allow SP to get some space */\
diff --git a/arch/arm/mach-s3c2440/mach-gta02.c b/arch/arm/mach-s3c2440/mach-gta02.c
index 8ade86d8e9a..87acd6c3cf2 100644
--- a/arch/arm/mach-s3c2440/mach-gta02.c
+++ b/arch/arm/mach-s3c2440/mach-gta02.c
@@ -138,7 +138,7 @@ static u8 hdq_tx_data_done;
 FIQ_HANDLER_START()
 /* define your locals here -- no initializers though */
 	u16 divisor;
-FIQ_HANDLER_ENTRY(256, 512)
+FIQ_HANDLER_ENTRY(64, 64)
 /* Your ISR here :-) */
 	divisor = 0xffff;